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Course contents

  • How to Use This Course
  • PD Flow Overview — RTL to GDSII
  • Data & Libraries — What PD Receives
  • Data and Libraries49
  • Floorplanning Expanded65
  • Power Planning57
  • Placement65
  • Clock Tree Synthesis57
  • Routing65
  • Timing Closure81
  • Signal Integrity and Variation41
    • Crosstalk Delta Delay
    • Noise and Glitch Analysis
    • OCV/AOCV/POCV Foundations
    • Derates and Margin Policy
    • SI-Driven Route Fixes
    • Signal Integrity and Variation Tricky Q&A
  • Power Signoff57
  • Physical Verification65
  • Physical Design Integration49
  • Signoff and Tapeout49
  • PD Interview Prep5
  • PD Closure Cheat Sheet
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‹Physical Design
  1. Topics
  2. Physical Design
  3. Signal Integrity and Variation

Physical Design · All levels

Signal Integrity and Variation

Signoff-grade SI and variation closure covering crosstalk delay, glitch risk, and derate policy governance.

  • 6topics
  • 41lessons

Topics in this section

  1. 1Crosstalk Delta Delay8 lessons
    • Crosstalk Delta Delay — Mechanism
    • Crosstalk Delta Delay — Inputs & Outputs
    • Crosstalk Delta Delay — Reports & Metrics
    • Crosstalk Delta Delay — Debug Playbook
    • Crosstalk Delta Delay — Worked Example
    • Crosstalk Delta Delay — Pitfalls & Red Flags
    • Crosstalk Delta Delay — Interview Drills
    • Crosstalk Delta Delay — Review Checklist
  2. 2Noise and Glitch Analysis8 lessons
    • Noise and Glitch Analysis — Mechanism
    • Noise and Glitch Analysis — Inputs & Outputs
    • Noise and Glitch Analysis — Reports & Metrics
    • Noise and Glitch Analysis — Debug Playbook
    • Noise and Glitch Analysis — Worked Example
    • Noise and Glitch Analysis — Pitfalls & Red Flags
    • Noise and Glitch Analysis — Interview Drills
    • Noise and Glitch Analysis — Review Checklist
  3. 3OCV/AOCV/POCV Foundations8 lessons
    • OCV/AOCV/POCV Foundations — Mechanism
    • OCV/AOCV/POCV Foundations — Inputs & Outputs
    • OCV/AOCV/POCV Foundations — Reports & Metrics
    • OCV/AOCV/POCV Foundations — Debug Playbook
    • OCV/AOCV/POCV Foundations — Worked Example
    • OCV/AOCV/POCV Foundations — Pitfalls & Red Flags
    • OCV/AOCV/POCV Foundations — Interview Drills
    • OCV/AOCV/POCV Foundations — Review Checklist
  4. 4Derates and Margin Policy8 lessons
    • Derates and Margin Policy — Mechanism
    • Derates and Margin Policy — Inputs & Outputs
    • Derates and Margin Policy — Reports & Metrics
    • Derates and Margin Policy — Debug Playbook
    • Derates and Margin Policy — Worked Example
    • Derates and Margin Policy — Pitfalls & Red Flags
    • Derates and Margin Policy — Interview Drills
    • Derates and Margin Policy — Review Checklist
  5. 5SI-Driven Route Fixes8 lessons
    • SI-Driven Route Fixes — Mechanism
    • SI-Driven Route Fixes — Inputs & Outputs
    • SI-Driven Route Fixes — Reports & Metrics
    • SI-Driven Route Fixes — Debug Playbook
    • SI-Driven Route Fixes — Worked Example
    • SI-Driven Route Fixes — Pitfalls & Red Flags
    • SI-Driven Route Fixes — Interview Drills
    • SI-Driven Route Fixes — Review Checklist
  6. 6Signal Integrity and Variation Tricky Q&A1 lesson
On this page

    Section goal

    Quantify and close SI/variation risk so reported timing reflects worst realistic silicon behavior.

    Mechanism to narrate

    • Delta delay and glitch must be analyzed together, not as separate checkboxes

    • Derate policy is a design decision, not only a CAD setting

    • Route fixes should be SI-efficient and congestion-aware

    Senior course bar for this section

    • Every topic should end with a signoff decision, not only concept recall.

    • Every fix should state expected metric movement and likely regression surface.

    • Every open assumption should have an owner, tag, and review date.

    • Every recurring issue should become a methodology guardrail or checklist item.

    1. crosstalk-delta-delay/ — Crosstalk Delta Delay

    2. noise-glitch-analysis/ — Noise and Glitch Analysis

    3. ocv-aocv-pocv-foundations/ — OCV/AOCV/POCV Foundations

    4. derates-and-margin-policy/ — Derates and Margin Policy

    5. si-driven-route-fixes/ — SI-Driven Route Fixes

    Related topics

    • Routing coupling fundamentals

    • Timing closure consumption

    • STA baseline concepts

    Key takeaways

    • Never declare timing closure without SI-enabled evidence at required corners.

    • Variation policy should be auditable and consistent across teams.

    Detailed section notes

    Interview performance is structured closure thinking under time pressure.

    Reports and artifacts to inspect

    • one-slide metric dashboard for the scenario

    • hypothesis list sorted by likelihood and cost

    • one report/map per experiment

    • regression list after the proposed fix

    Mini case study

    A strong answer to any scenario starts with the failing metric and signoff context. A weak answer starts with a tool command or random optimization knob.

    Debug branches

    • If you are stuck, restate the metric and ask for corner/mode/stage.

    • If multiple failures exist, separate hard gates from tracked risks.

    • If pressured to waive, describe approval path and silicon risk.

    Senior review question

    Ask yourself: what single report line would prove this page's concept is either passing or failing?

    What changes at 10+ years

    • You are expected to predict what your fix can break before running it.

    • You should recognize when the issue is methodology, not one block's implementation.

    • You should communicate risk in tapeout language: owner, evidence, impact, mitigation, and decision date.

    Principal-level review bar

    Hub pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.

    What excellent looks like

    • Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.

    • Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.

    • Chooses experiments by information gain and reversibility, not by habit.

    • States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.

    • Turns recurring failures into methodology guardrails, dashboards, or checklist items.

    Closure note template

    Diagram
    STAFF / PRINCIPAL CLOSURE NOTE
    
    Context:
      stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
      tag: <database / netlist / SDC / library stack>
      failing metric: <exact report line>
      affected scope: <block / hierarchy / path group / power domain / region>
    
    Hypotheses:
      H1: <most likely physical or constraint mechanism>
      H2: <competing explanation>
      H3: <methodology or input-data issue>
    
    Decision:
      next experiment: <cheap check that can falsify H1>
      fix candidate: <minimal reversible change>
      rollback trigger: <metric that says the fix is wrong>
      regression set: <timing / route / power / PV / DFT / package>
      escalation owner: <team or reviewer>

    Tradeoffs a senior engineer must discuss

    Technical tradeoff

    Interview performance is structured closure thinking under time pressure. Explain not only the preferred fix, but what margin or schedule you are spending to get it.

    Cross-team tradeoff

    • What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?

    • Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?

    • What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?

    Leadership communication

    Diagram
    "The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."

    Key takeaways

    • Always connect the concept back to a measurable signoff artifact.

    • A fix is not complete until you can name the regression checks.

    Common pitfalls

    • Optimizing by habit instead of reading the current report.

    • Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.

    PreviousNext: Analog and Mixed-Signal Keepouts

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    See also

    • How to Use This Course
    • PD Flow Overview — RTL to GDSII
    • Data & Libraries — What PD Receives