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Course contents

  • How to Use This Course
  • PD Flow Overview — RTL to GDSII
  • Data & Libraries — What PD Receives
  • Data and Libraries49
  • Floorplanning Expanded65
  • Power Planning57
  • Placement65
  • Clock Tree Synthesis57
  • Routing65
  • Timing Closure81
  • Signal Integrity and Variation41
    • Crosstalk Delta Delay
      • Crosstalk Delta Delay — Mechanism
      • Crosstalk Delta Delay — Inputs & Outputs
      • Crosstalk Delta Delay — Reports & Metrics
      • Crosstalk Delta Delay — Debug Playbook
      • Crosstalk Delta Delay — Worked Example
      • Crosstalk Delta Delay — Pitfalls & Red Flags
      • Crosstalk Delta Delay — Interview Drills
      • Crosstalk Delta Delay — Review Checklist
    • Noise and Glitch Analysis
    • OCV/AOCV/POCV Foundations
    • Derates and Margin Policy
    • SI-Driven Route Fixes
    • Signal Integrity and Variation Tricky Q&A
  • Power Signoff57
  • Physical Verification65
  • Physical Design Integration49
  • Signoff and Tapeout49
  • PD Interview Prep5
  • PD Closure Cheat Sheet
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‹Signal Integrity and Variation
  1. Topics
  2. Physical Design
  3. Signal Integrity and Variation
  4. Crosstalk Delta Delay

Physical Design · All levels

Crosstalk Delta Delay

Crosstalk Delta Delay — physical design implementation and signoff.

  • 8topics
  • 8lessons

Topics in this section

  1. 1Crosstalk Delta Delay — Mechanism1 lesson
  2. 2Crosstalk Delta Delay — Inputs & Outputs1 lesson
  3. 3Crosstalk Delta Delay — Reports & Metrics1 lesson
  4. 4Crosstalk Delta Delay — Debug Playbook1 lesson
  5. 5Crosstalk Delta Delay — Worked Example1 lesson
  6. 6Crosstalk Delta Delay — Pitfalls & Red Flags1 lesson
  7. 7Crosstalk Delta Delay — Interview Drills1 lesson
  8. 8Crosstalk Delta Delay — Review Checklist1 lesson
On this page

    On-call / interview prompt

    You own Crosstalk Delta Delay on a block nearing implementation freeze — what do you verify first?

    Diagram
    CLOSURE CHAIN
    
    1. METRIC     — name the failing report line (WNS, DRV, DRC count, IR %)
    2. HYPOTHESIS — 2–3 likely causes ordered by probability
    3. EXPERIMENT — one cheap check (corner, clock, report, map)
    4. FIX        — minimal physical or constraint change
    5. REGRESSION — what you re-run and what must not regress

    Topic overview

    Analyze aggressor-victim interactions that shift net delay and reorder critical paths after route.

    Mechanism to narrate

    • Section: Signal Integrity and Variation

    • Primary artifact: SI delta-delay report with aggressor attribution

    • Downstream dependency: next PD stage

    Staff/principal ownership model

    Own Crosstalk Delta Delay as a release decision, not a page of notes. A senior PD engineer names the metric, the physical mechanism, the cross-team dependency, and the smallest evidence-producing experiment.

    Diagram
    STAFF REVIEW MEMO — Signal Integrity and Variation / Crosstalk Delta Delay
    
    1. Current state
       - Failing / watched metric: SI delta-delay report with aggressor attribution
       - Database tag, corner/mode, tool version: <fill before review>
       - Physical scope: block, hierarchy, macro region, clock domain, or net class
    
    2. Root-cause hypothesis
       - Most likely mechanism: <name physical or constraint mechanism>
       - Competing hypothesis: <name the second plausible cause>
       - Evidence still missing: <report/map/schematic/check>
    
    3. Proposed action
       - Minimal reversible fix: <physical, constraint, ECO, or methodology change>
       - Expected improvement: <metric delta>
       - Regression risk: late-stage schedule slip, silicon risk, or cross-stage regression
    
    4. Regression and signoff
       - Re-run: SI delta-delay report with aggressor attribution
       - Must not regress: timing, routing, power, PV, DFT, package, or tapeout signoff
       - Decision owner: PD owner

    Sub-lessons in this topic

    1. mechanism — Mechanism

    2. inputs-outputs — Inputs & Outputs

    3. reports — Reports & Metrics

    4. debug-playbook — Debug Playbook

    5. worked-example — Worked Example

    6. pitfalls — Pitfalls & Red Flags

    7. interview — Interview Drills

    8. checklist — Review Checklist

    Related topics

    • Routing layer and spacing knobs

    • Extraction dependency for SI timing

    Key takeaways

    • Master Crosstalk Delta Delay through reports, not GUI habit.

    Deep dive: how this shows up in real closure

    Interview performance is structured closure thinking under time pressure.

    Reports and artifacts to inspect

    • one-slide metric dashboard for the scenario

    • hypothesis list sorted by likelihood and cost

    • one report/map per experiment

    • regression list after the proposed fix

    Mini case study

    A strong answer to any scenario starts with the failing metric and signoff context. A weak answer starts with a tool command or random optimization knob.

    Debug branches

    • If you are stuck, restate the metric and ask for corner/mode/stage.

    • If multiple failures exist, separate hard gates from tracked risks.

    • If pressured to waive, describe approval path and silicon risk.

    Senior review question

    Ask yourself: what single report line would prove this page's concept is either passing or failing?

    What changes at 10+ years

    • You are expected to predict what your fix can break before running it.

    • You should recognize when the issue is methodology, not one block's implementation.

    • You should communicate risk in tapeout language: owner, evidence, impact, mitigation, and decision date.

    Principal-level review bar

    Lesson pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.

    What excellent looks like

    • Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.

    • Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.

    • Chooses experiments by information gain and reversibility, not by habit.

    • States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.

    • Turns recurring failures into methodology guardrails, dashboards, or checklist items.

    Closure note template

    Diagram
    STAFF / PRINCIPAL CLOSURE NOTE
    
    Context:
      stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
      tag: <database / netlist / SDC / library stack>
      failing metric: <exact report line>
      affected scope: <block / hierarchy / path group / power domain / region>
    
    Hypotheses:
      H1: <most likely physical or constraint mechanism>
      H2: <competing explanation>
      H3: <methodology or input-data issue>
    
    Decision:
      next experiment: <cheap check that can falsify H1>
      fix candidate: <minimal reversible change>
      rollback trigger: <metric that says the fix is wrong>
      regression set: <timing / route / power / PV / DFT / package>
      escalation owner: <team or reviewer>

    Tradeoffs a senior engineer must discuss

    Technical tradeoff

    Interview performance is structured closure thinking under time pressure. Explain not only the preferred fix, but what margin or schedule you are spending to get it.

    Cross-team tradeoff

    • What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?

    • Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?

    • What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?

    Leadership communication

    Diagram
    "The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."

    Key takeaways

    • Always connect the concept back to a measurable signoff artifact.

    • A fix is not complete until you can name the regression checks.

    Common pitfalls

    • Optimizing by habit instead of reading the current report.

    • Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.

    PreviousNext: Metal Layer Planning and Capacity Management

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    See also

    • Noise and Glitch Analysis
    • OCV/AOCV/POCV Foundations
    • Derates and Margin Policy