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Course contents

  • How to Use This Course
  • PD Flow Overview — RTL to GDSII
  • Data & Libraries — What PD Receives
  • Data and Libraries49
  • Floorplanning Expanded65
  • Power Planning57
  • Placement65
  • Clock Tree Synthesis57
  • Routing65
  • Timing Closure81
    • SDC for Implementation
    • Setup/Hold Closure Playbook
    • MCMM Signoff Strategy
    • ECO Timing Fixes
    • Path Group Prioritization
    • Generated Clocks and Clock Groups
    • IO Timing and Block Boundaries
    • Useful Skew in Timing Closure
    • Post-Route Extraction and SPEF
    • Timing Signoff Dashboard
    • Timing Closure Tricky Q&A
  • Signal Integrity and Variation41
  • Power Signoff57
  • Physical Verification65
  • Physical Design Integration49
  • Signoff and Tapeout49
  • PD Interview Prep5
  • PD Closure Cheat Sheet
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‹Physical Design
  1. Topics
  2. Physical Design
  3. Timing Closure

Physical Design · All levels

Timing Closure

Constraint-quality-first timing closure for MCMM signoff, ECO loops, and dashboard-driven risk management.

  • 11topics
  • 81lessons

Topics in this section

  1. 1SDC for Implementation8 lessons
    • SDC for Implementation — Mechanism
    • SDC for Implementation — Inputs & Outputs
    • SDC for Implementation — Reports & Metrics
    • SDC for Implementation — Debug Playbook
    • SDC for Implementation — Worked Example
    • SDC for Implementation — Pitfalls & Red Flags
    • SDC for Implementation — Interview Drills
    • SDC for Implementation — Review Checklist
  2. 2Setup/Hold Closure Playbook8 lessons
    • Setup/Hold Closure Playbook — Mechanism
    • Setup/Hold Closure Playbook — Inputs & Outputs
    • Setup/Hold Closure Playbook — Reports & Metrics
    • Setup/Hold Closure Playbook — Debug Playbook
    • Setup/Hold Closure Playbook — Worked Example
    • Setup/Hold Closure Playbook — Pitfalls & Red Flags
    • Setup/Hold Closure Playbook — Interview Drills
    • Setup/Hold Closure Playbook — Review Checklist
  3. 3MCMM Signoff Strategy8 lessons
    • MCMM Signoff Strategy — Mechanism
    • MCMM Signoff Strategy — Inputs & Outputs
    • MCMM Signoff Strategy — Reports & Metrics
    • MCMM Signoff Strategy — Debug Playbook
    • MCMM Signoff Strategy — Worked Example
    • MCMM Signoff Strategy — Pitfalls & Red Flags
    • MCMM Signoff Strategy — Interview Drills
    • MCMM Signoff Strategy — Review Checklist
  4. 4ECO Timing Fixes8 lessons
    • ECO Timing Fixes — Mechanism
    • ECO Timing Fixes — Inputs & Outputs
    • ECO Timing Fixes — Reports & Metrics
    • ECO Timing Fixes — Debug Playbook
    • ECO Timing Fixes — Worked Example
    • ECO Timing Fixes — Pitfalls & Red Flags
    • ECO Timing Fixes — Interview Drills
    • ECO Timing Fixes — Review Checklist
  5. 5Path Group Prioritization8 lessons
    • Path Group Prioritization — Mechanism
    • Path Group Prioritization — Inputs & Outputs
    • Path Group Prioritization — Reports & Metrics
    • Path Group Prioritization — Debug Playbook
    • Path Group Prioritization — Worked Example
    • Path Group Prioritization — Pitfalls & Red Flags
    • Path Group Prioritization — Interview Drills
    • Path Group Prioritization — Review Checklist
  6. 6Generated Clocks and Clock Groups8 lessons
    • Generated Clocks and Clock Groups — Mechanism
    • Generated Clocks and Clock Groups — Inputs & Outputs
    • Generated Clocks and Clock Groups — Reports & Metrics
    • Generated Clocks and Clock Groups — Debug Playbook
    • Generated Clocks and Clock Groups — Worked Example
    • Generated Clocks and Clock Groups — Pitfalls & Red Flags
    • Generated Clocks and Clock Groups — Interview Drills
    • Generated Clocks and Clock Groups — Review Checklist
  7. 7IO Timing and Block Boundaries8 lessons
    • IO Timing and Block Boundaries — Mechanism
    • IO Timing and Block Boundaries — Inputs & Outputs
    • IO Timing and Block Boundaries — Reports & Metrics
    • IO Timing and Block Boundaries — Debug Playbook
    • IO Timing and Block Boundaries — Worked Example
    • IO Timing and Block Boundaries — Pitfalls & Red Flags
    • IO Timing and Block Boundaries — Interview Drills
    • IO Timing and Block Boundaries — Review Checklist
  8. 8Useful Skew in Timing Closure8 lessons
    • Useful Skew in Timing Closure — Mechanism
    • Useful Skew in Timing Closure — Inputs & Outputs
    • Useful Skew in Timing Closure — Reports & Metrics
    • Useful Skew in Timing Closure — Debug Playbook
    • Useful Skew in Timing Closure — Worked Example
    • Useful Skew in Timing Closure — Pitfalls & Red Flags
    • Useful Skew in Timing Closure — Interview Drills
    • Useful Skew in Timing Closure — Review Checklist
  9. 9Post-Route Extraction and SPEF8 lessons
    • Post-Route Extraction and SPEF — Mechanism
    • Post-Route Extraction and SPEF — Inputs & Outputs
    • Post-Route Extraction and SPEF — Reports & Metrics
    • Post-Route Extraction and SPEF — Debug Playbook
    • Post-Route Extraction and SPEF — Worked Example
    • Post-Route Extraction and SPEF — Pitfalls & Red Flags
    • Post-Route Extraction and SPEF — Interview Drills
    • Post-Route Extraction and SPEF — Review Checklist
  10. 10Timing Signoff Dashboard8 lessons
    • Timing Signoff Dashboard — Mechanism
    • Timing Signoff Dashboard — Inputs & Outputs
    • Timing Signoff Dashboard — Reports & Metrics
    • Timing Signoff Dashboard — Debug Playbook
    • Timing Signoff Dashboard — Worked Example
    • Timing Signoff Dashboard — Pitfalls & Red Flags
    • Timing Signoff Dashboard — Interview Drills
    • Timing Signoff Dashboard — Review Checklist
  11. 11Timing Closure Tricky Q&A1 lesson
On this page

    Section goal

    Close setup and hold across all required corners/modes with evidence-backed fixes and zero unconstrained surprises.

    Mechanism to narrate

    • Treat SDC, SPEF, and corner decks as one signed contract

    • Prioritize path groups by tapeout risk and endpoint ownership

    • Use a signoff dashboard to prevent last-week blind spots

    Senior course bar for this section

    • Every topic should end with a signoff decision, not only concept recall.

    • Every fix should state expected metric movement and likely regression surface.

    • Every open assumption should have an owner, tag, and review date.

    • Every recurring issue should become a methodology guardrail or checklist item.

    1. sdc-for-implementation/ — SDC for Implementation

    2. setup-hold-closure-playbook/ — Setup/Hold Closure Playbook

    3. multi-corner-multi-mode-signoff/ — MCMM Signoff Strategy

    4. eco-timing-fixes/ — ECO Timing Fixes

    5. path-group-prioritization/ — Path Group Prioritization

    6. generated-clocks-and-clock-groups/ — Generated Clocks and Clock Groups

    7. io-timing-and-block-boundaries/ — IO Timing and Block Boundaries

    8. useful-skew-timing-closure/ — Useful Skew in Timing Closure

    9. post-route-extraction-and-spef/ — Post-Route Extraction and SPEF

    10. timing-signoff-dashboard/ — Timing Signoff Dashboard

    Related topics

    • RTL STA intro

    • RTL timing architecture

    • Clock tree synthesis

    • Routing closure

    Key takeaways

    • Name corner, mode, and report source before proposing a fix.

    • Avoid hero ECOs; prefer repeatable cluster-level closure loops.

    Detailed section notes

    Timing closure is a signoff matrix problem, not a single worst-path problem.

    Reports and artifacts to inspect

    • report_timing -max and -min with corner, mode, SI, and OCV enabled

    • path group WNS/TNS: which clock domain is actually blocking signoff

    • net delay percentage vs cell delay percentage

    • exception audit: false paths, multicycle paths, generated clocks

    Mini case study

    A -90 ps setup path has 75% net delay and crosses a macro channel. Sizing the launch flop is weak. The stronger response is to layer-promote or shorten the route, then re-run hold at the fast corner.

    Debug branches

    • If net delay dominates, look for physical fixes before cell sizing.

    • If cell delay dominates, consider VT swap, sizing, or RTL micro-architecture.

    • If only one mode fails, inspect mode-specific SDC overlays and case analysis.

    Senior review question

    Ask yourself: what single report line would prove this page's concept is either passing or failing?

    What changes at 10+ years

    • You are expected to predict what your fix can break before running it.

    • You should recognize when the issue is methodology, not one block's implementation.

    • You should communicate risk in tapeout language: owner, evidence, impact, mitigation, and decision date.

    Principal-level review bar

    Hub pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.

    What excellent looks like

    • Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.

    • Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.

    • Chooses experiments by information gain and reversibility, not by habit.

    • States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.

    • Turns recurring failures into methodology guardrails, dashboards, or checklist items.

    Closure note template

    Diagram
    STAFF / PRINCIPAL CLOSURE NOTE
    
    Context:
      stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
      tag: <database / netlist / SDC / library stack>
      failing metric: <exact report line>
      affected scope: <block / hierarchy / path group / power domain / region>
    
    Hypotheses:
      H1: <most likely physical or constraint mechanism>
      H2: <competing explanation>
      H3: <methodology or input-data issue>
    
    Decision:
      next experiment: <cheap check that can falsify H1>
      fix candidate: <minimal reversible change>
      rollback trigger: <metric that says the fix is wrong>
      regression set: <timing / route / power / PV / DFT / package>
      escalation owner: <team or reviewer>

    Tradeoffs a senior engineer must discuss

    Technical tradeoff

    Timing closure is a signoff matrix problem, not a single worst-path problem. Explain not only the preferred fix, but what margin or schedule you are spending to get it.

    Cross-team tradeoff

    • What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?

    • Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?

    • What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?

    Leadership communication

    Diagram
    "The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."

    Key takeaways

    • Always connect the concept back to a measurable signoff artifact.

    • A fix is not complete until you can name the regression checks.

    Common pitfalls

    • Optimizing by habit instead of reading the current report.

    • Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.

    PreviousNext: Antenna Rules and Corrective Strategies

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    See also

    • How to Use This Course
    • PD Flow Overview — RTL to GDSII
    • Data & Libraries — What PD Receives