EM analysis flags high-current stripes with sparse vias. How do you decide between local via ladders, strap redesign, or current redistribution?
CLOSURE CHAIN
1. METRIC — name the failing report line (WNS, DRV, DRC count, IR %)
2. HYPOTHESIS — 2–3 likely causes ordered by probability
3. EXPERIMENT — one cheap check (corner, clock, report, map)
4. FIX — minimal physical or constraint change
5. REGRESSION — what you re-run and what must not regressEngineer via strategy for resistance, EM robustness, and manufacturable vertical connectivity.
Section: Routing
Primary artifact: see Reports subpage
Downstream dependency: Power integrity and lifetime reliability signoff depend on via robustness.
Own Via Planning and Via Ladder Reliability as a release decision, not a page of notes. A senior PD engineer names the metric, the physical mechanism, the cross-team dependency, and the smallest evidence-producing experiment.
STAFF REVIEW MEMO — Routing / Via Planning and Via Ladder Reliability
1. Current state
- Failing / watched metric: Routing closure dashboard
- Database tag, corner/mode, tool version: <fill before review>
- Physical scope: block, hierarchy, macro region, clock domain, or net class
2. Root-cause hypothesis
- Most likely mechanism: <name physical or constraint mechanism>
- Competing hypothesis: <name the second plausible cause>
- Evidence still missing: <report/map/schematic/check>
3. Proposed action
- Minimal reversible fix: <physical, constraint, ECO, or methodology change>
- Expected improvement: <metric delta>
- Regression risk: Under-designed via structures can cause EM failures and silicon reliability issues.
4. Regression and signoff
- Re-run: Routing closure dashboard
- Must not regress: Power integrity and lifetime reliability signoff depend on via robustness.
- Decision owner: PD ownermechanism — Mechanism
inputs-outputs — Inputs & Outputs
reports — Reports & Metrics
debug-playbook — Debug Playbook
worked-example — Worked Example
pitfalls — Pitfalls & Red Flags
interview — Interview Drills
checklist — Review Checklist
Master Via Planning and Via Ladder Reliability through reports, not GUI habit.
Routing decides whether the placed design is manufacturable and extractable.
global route overflow by layer and region
detailed route DRC/DRV summary grouped by rule
antenna report: gate area, metal area, ratio, suggested diode
post-route extraction delta on critical nets
Detailed route completes with 4,000 spacing violations around a macro channel. The design is not 'routed'. Cluster by rule and region, fix the channel or layer plan, then re-route locally.
If antenna violations cluster on long lower-metal routes, jump to upper metal earlier or insert diode cells.
If via violations dominate, inspect via arrays and preferred via stacks, especially on power transitions.
If crosstalk worsens timing, space, shield, or layer-promote the victim nets.
Ask yourself: what single report line would prove this page's concept is either passing or failing?
You are expected to predict what your fix can break before running it.
You should recognize when the issue is methodology, not one block's implementation.
You should communicate risk in tapeout language: owner, evidence, impact, mitigation, and decision date.
Lesson pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.
Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.
Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.
Chooses experiments by information gain and reversibility, not by habit.
States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.
Turns recurring failures into methodology guardrails, dashboards, or checklist items.
STAFF / PRINCIPAL CLOSURE NOTE
Context:
stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
tag: <database / netlist / SDC / library stack>
failing metric: <exact report line>
affected scope: <block / hierarchy / path group / power domain / region>
Hypotheses:
H1: <most likely physical or constraint mechanism>
H2: <competing explanation>
H3: <methodology or input-data issue>
Decision:
next experiment: <cheap check that can falsify H1>
fix candidate: <minimal reversible change>
rollback trigger: <metric that says the fix is wrong>
regression set: <timing / route / power / PV / DFT / package>
escalation owner: <team or reviewer>Routing decides whether the placed design is manufacturable and extractable. Explain not only the preferred fix, but what margin or schedule you are spending to get it.
What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?
Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?
What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?
"The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."Always connect the concept back to a measurable signoff artifact.
A fix is not complete until you can name the regression checks.
Optimizing by habit instead of reading the current report.
Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.