Physical Design · All levels
Global and Detailed Routing Convergence — Pitfalls & Red Flags
Pitfalls & Red Flags for Global and Detailed Routing Convergence (Routing).
Common mistakes
Trusting route-complete status without overflow and DRC context.
Running full-chip rip-up loops for local failures.
Skipping extraction updates after major route changes.
Red flags in reviews
Cannot explain worst report line
No regression list after proposed fix
Waiver requested without cluster analysis
Failure modes seen in real tapeouts
A fix is accepted because the local metric improved, while the release tag silently changes.
A waiver is treated as permission to ignore root cause instead of a tracked risk with owner and expiry.
A tool knob hides the symptom but creates a non-repeatable methodology dependency.
A local improvement in Global and Detailed Routing Convergence regresses Timing closure and PV signoff rely on robust route legality..
How a senior engineer recovers
Freeze the evidence: tag, report, layout snapshot, and command-line switches.
Name the real owner and approval path.
Convert the lesson into a checklist item, regression, or methodology guardrail.
Deep dive: how this shows up in real closure
Routing decides whether the placed design is manufacturable and extractable.
Reports and artifacts to inspect
global route overflow by layer and region
detailed route DRC/DRV summary grouped by rule
antenna report: gate area, metal area, ratio, suggested diode
post-route extraction delta on critical nets
Mini case study
Detailed route completes with 4,000 spacing violations around a macro channel. The design is not 'routed'. Cluster by rule and region, fix the channel or layer plan, then re-route locally.
Debug branches
If antenna violations cluster on long lower-metal routes, jump to upper metal earlier or insert diode cells.
If via violations dominate, inspect via arrays and preferred via stacks, especially on power transitions.
If crosstalk worsens timing, space, shield, or layer-promote the victim nets.
Senior review question
Ask yourself: what single report line would prove this page's concept is either passing or failing?
What changes at 10+ years
You are expected to predict what your fix can break before running it.
You should recognize when the issue is methodology, not one block's implementation.
You should communicate risk in tapeout language: owner, evidence, impact, mitigation, and decision date.
Principal-level review bar
Deep subpage pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.
What excellent looks like
Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.
Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.
Chooses experiments by information gain and reversibility, not by habit.
States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.
Turns recurring failures into methodology guardrails, dashboards, or checklist items.
Closure note template
STAFF / PRINCIPAL CLOSURE NOTE
Context:
stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
tag: <database / netlist / SDC / library stack>
failing metric: <exact report line>
affected scope: <block / hierarchy / path group / power domain / region>
Hypotheses:
H1: <most likely physical or constraint mechanism>
H2: <competing explanation>
H3: <methodology or input-data issue>
Decision:
next experiment: <cheap check that can falsify H1>
fix candidate: <minimal reversible change>
rollback trigger: <metric that says the fix is wrong>
regression set: <timing / route / power / PV / DFT / package>
escalation owner: <team or reviewer>Tradeoffs a senior engineer must discuss
Technical tradeoff
Routing decides whether the placed design is manufacturable and extractable. Explain not only the preferred fix, but what margin or schedule you are spending to get it.
Cross-team tradeoff
What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?
Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?
What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?
Leadership communication
"The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."Key takeaways
Always connect the concept back to a measurable signoff artifact.
A fix is not complete until you can name the regression checks.
Common pitfalls
Optimizing by habit instead of reading the current report.
Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.