Stage 3 produces the event and start-up record: the 8-line interrupt map with its 135.4 to 182.3 ns budget, the DMA driver sequence that survives every contract trap, the sixteen-step boot flow totalling 12.581 ms, and the security attribute of both masters, with the one known hole in it. Planted bugs 3, 7, 8 and 9 live here: a mis-wired interrupt, a secure attribute, a length mismatch and three contract traps.
Lesson | After it you can... |
|---|---|
Wire each source to its line and bound its latency. | |
Programme a job that agrees on lengths, keys and status. | |
Walk the boot timeline and partition secure from non-secure. |
Suggested order: top to bottom. Interrupts first, because the DMA sequence ends in one; DMA second, because boot runs a self-test job; boot last, because it consumes both. Every input here is an active-high level held until cleared; anything shorter than 2 clk_per (83.3 ns) can be missed.
The controller remembers nothing, so a pulse shorter than the synchroniser window vanishes; sources must hold their level until software clears it.