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Corner / Mode Matrix Design

MMMC Signoff: MMMC runs STA across PVT corners and functional modes; the matrix must cover real silicon without exploding runtime.

What this topic teaches

Corner / Mode Matrix Design is about converting constraints and path rules into measurable slack. MMMC runs STA across PVT corners and functional modes; the matrix must cover real silicon without exploding runtime. The hard part is never the textbook inequality; it is proving, under the right corner/mode/view, which layer — constraint, view, or implementation — broke the contract.

The senior-engineer question

When corner coverage completeness, mode cross-product size, signoff WNS per scenario moves, can you identify the failing path group, the STA layer, the responsible owner, and the smallest experiment that proves the root cause?

diagram
STA CLOSURE FLOW — Corner / Mode Matrix Design

constraints (SDC)
        |
        v
timing graph (cell + net delays)
        |
        v
MMMC scenarios (corner x mode x view)
        |
        v
variation + SI adjustments
        |
        v
slack (WNS/TNS) -> ECO -> regression

Debug rule: always state corner, mode, view, and database tag with slack.

Picture the timing closure flow

Start every study session by drawing the behavior before reading signals. The diagrams below are the mental models to reproduce on a whiteboard.

MMMC scenario cube

diagram
MMMC MATRIX

           mode: func   test   low_power
corner ss     [ ]       [ ]      [ ]
       tt     [ ]       [ ]      [ ]
       ff     [ ]       [ ]      [ ]

Each checked cell = full STA run.
Signoff = worst WNS across all checked cells.

Timing path sequence

diagram
TIMING PATH — Corner / Mode Matrix Design

launch FF --logic stages--> capture FF
     |                           |
  launch clock                capture clock
     |                           |
  required: arrival < capture_edge - setup
  metric: corner coverage completeness, mode cross-product size, signoff WNS per scenario

Who owns which layer

diagram
STA OWNERSHIP LAYERS — Corner / Mode Matrix Design

layer              owns                         failure mode
----------------   --------------------------   ---------------------
constraints        clocks, IO, exceptions       false violations
implementation     cells, nets, placement       real path delay
extraction         SPEF/RC corners              view mismatch
signoff policy     derate, MMMC matrix          margin disputes
closure           ECO order, regression        fix breaks other corner

Evidence to collect

  • Primary metric: corner coverage completeness, mode cross-product size, signoff WNS per scenario.

  • Primary artifact: MMMC scenario table, signoff matrix spreadsheet, scenario WNS dashboard.

  • Owners to bring into review: STA lead, library owner, product architect.

  • Spec clause or requirement ID for every constraint claim.

  • One failing report_timing excerpt and one reduced path that isolates the rule.

Ownership map

diagram
OWNERSHIP MAP — Corner / Mode Matrix Design

artifact              owner
----------------      -----------------
timing report       STA lead
SDC/constraint      library owner
implementation      product architect

Every WNS cluster needs a named owner before ECO.

Subpages in this topic

Each topic is taught across mechanism, inputs/outputs, reports, debug, worked example, pitfalls, interview, checklist, theory, design space, expanded case study, walkthrough, comparison matrix, software view, and silicon PPA impact.

Key takeaways

  • State corner, mode, and view with every slack number.

  • Separate constraint bugs, view mismatches, and real path delays before ECO.

  • Run setup and hold plus full MMMC after every change.

Common pitfalls

  • Comparing runs with different SPEF or SDC tags.

  • Broad false_path to hide violations.

  • Setup-only ECO without hold regression.

STA deep dive

Signoff WNS is the minimum across the full scenario matrix.

Concept diagram

diagram
MMMC

corners (ss/tt/ff) x modes (func/test) x views (signoff RC)
= scenario set -> min(WNS) is signoff

Metric graph

diagram
WNS HEATMAP BY CORNER

        ss    tt    ff
setup  -80   +10   +5
hold   -15   -2    -8

Reports and artifacts

  • per-corner WNS

  • mode summary

  • lib map audit

  • view delta

Mini case study

Passed TT typical but failed SS hold — signoff matrix was incomplete; added low-voltage mode.

Debug branches

  • Isolate failing scenario first

  • Never compare unlike SPEF tags

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

  • State corner, mode, view, and database tag with every slack claim.

  • Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

  • Comparing STA runs with different SPEF or SDC tags.

  • Broad false_path to green-wash violations.

  • Setup-only ECO without hold check.