Silicon is not the same from one die to the next, and each die runs at varying voltage and temperature. Sign-off must hold for every combination the product can see. A corner is a named set of conditions, with a matching set of timing libraries, that stands for one extreme.
Source | Examples | Effect on timing |
|---|---|---|
Process | Slow, typical and fast transistors | Larger delays for slow, smaller for fast |
Voltage | Low supply, nominal, high | Delay generally increases as voltage falls |
Temperature | Cold, room, hot | Direction depends on the technology and voltage (see the temperature inversion lesson) |
# Illustrative: a long path (data) and a short path (hold) analysed in three corners.
period, setup, hold_req = 1.00, 0.06, 0.07
scale = {"slow": 1.30, "typical": 1.00, "fast": 0.80} # delay scale relative to typical
long_nominal, short_nominal = 0.70, 0.10
res = {}
for name, k in scale.items():
setup_slack = period - setup - long_nominal * k
hold_slack = short_nominal * k - hold_req
res[name] = (round(setup_slack, 3), round(hold_slack, 3))
assert res == {"slow": (0.03, 0.06), "typical": (0.24, 0.03), "fast": (0.38, 0.01)}
worst_setup = min(res, key=lambda c: res[c][0])
worst_hold = min(res, key=lambda c: res[c][1])
assert (worst_setup, worst_hold) == ("slow", "fast")
print("PASS: worst setup in", worst_setup, "corner; worst hold in", worst_hold, "corner")The same design has 0.03 ns of setup slack in the slow corner and 0.38 ns in the fast one, but the order reverses for hold: 0.06 ns in the slow corner and only 0.01 ns in the fast one. Neither extreme is enough alone. For these illustrative corners that covers the two checks; in general each check must be signed off in every corner that can be worst for it (the temperature extremes at each voltage, clock-path variation), not in one corner per check.
Each check type is signed off in the corners where it is worst, not in one corner for everything.
The corner list is written down with its libraries and conditions, and agreed before closure begins.
A corner is added when a new effect appears (a new voltage domain, a new operating point), not only when a failure appears.
The fast-process corners at each voltage, including the fast low-voltage hot corner where the library data shows short paths are fastest, because hold margin is smallest where short paths are fastest.