STA Mastery · All levels
Delta Delay Mechanism: Comparison Matrix
Comparison Matrix for Delta Delay Mechanism.
Comparison matrix
SI fixes trade spacing, shielding, power, and route congestion.
+------------------+----------------+----------------+----------------+
| Approach | Strength | Weakness | Best when |
+------------------+----------------+----------------+----------------+
| Conservative | safe | slow closure | risk-averse |
| Balanced | practical | needs discipline | production |
| Aggressive | fast | regression risk | tapeout crunch |
| RTL change | structural | long loop | architectural |
+------------------+----------------+----------------+----------------+When to choose each approach
Match approach to schedule and silicon risk
Interview traps
One-size ECO playbook
Ignoring hold
Evidence comparison
STA EVIDENCE MATRIX — Delta Delay Mechanism
+-------------------+------------------------+--------------------------+-------------------------+
| Evidence | Tells you | Does not prove | Next action |
+-------------------+------------------------+--------------------------+-------------------------+
| report_timing | critical path slack | root cause class | cell vs net split |
| clock report | clock reachability | path delay | fix generated_clock |
| SDC diff | constraint change | physical delay | re-run all scenarios |
| SPEF tag compare | parasitic view | constraint quality | isolate view mismatch |
| MMMC dashboard | worst scenario | single-path fix | assign path group owner |
+-------------------+------------------------+--------------------------+-------------------------+STA deep dive
Coupling makes delay a function of neighbors, not just wire RC.
Concept diagram
SI ON VICTIM
victim net delay = base_RC + coupling_from_aggressorsMetric graph
DELTA DELAY ON CRITICAL PATHS
no SI ████████ 1.2ns
with SI ██████████ 1.35ns (+150ps)Reports and artifacts
delta delay report
aggressor list
noise peaks
SI WNS delta
Mini case study
Setup fixed by upsize but SI worsened — spacing ECO on bus bits recovered margin.
Debug branches
Re-run SI after every timing ECO
Shield wide switching buses
Senior review question
Ask: what corner/mode/view proves this topic is closed or failing?
Key takeaways
State corner, mode, view, and database tag with every slack claim.
Run setup and hold plus MMMC regression after every ECO.
Common pitfalls
Comparing STA runs with different SPEF or SDC tags.
Broad false_path to green-wash violations.
Setup-only ECO without hold check.
Principal STA review addendum
Coupling capacitance between adjacent nets changes effective delay; aggressors slow or speed victims depending on switching alignment.
Metric: delta delay on critical paths, aggressor count, SI WNS impact