Delta Delay Mechanism: Mechanism

Mechanism to understand

Mechanism for Delta Delay Mechanism focuses on delta delay on critical paths, aggressor count, SI WNS impact. The goal is to connect the observable symptom to timing mechanism, ownership, and regression risk.

Coupling capacitance between adjacent nets changes effective delay; aggressors slow or speed victims depending on switching alignment. Think of STA as a signed contract between constraints, parasitics, and implementation — slack is the measurable outcome.

• Identify launch and capture clocks on the failing path.

• Identify path group: reg2reg, in2reg, reg2out, or async.

• Identify whether setup, hold, or both fail in the scenario.

Layered view

STA CLOSURE FLOW — Delta Delay Mechanism

constraints (SDC)
        |
        v
timing graph (cell + net delays)
        |
        v
MMMC scenarios (corner x mode x view)
        |
        v
variation + SI adjustments
        |
        v
slack (WNS/TNS) -> ECO -> regression

Debug rule: always state corner, mode, view, and database tag with slack.

Aggressor / victim coupling

VICTIM NET  ~~~~~~~~~~~~ (quiet)
AGGRESSOR   ^   ^   ^   ^  (switching)

Aligned switching -> delta delay on victim
SI analysis adds coupling to effective RC

Layer responsibilities

STA OWNERSHIP LAYERS — Delta Delay Mechanism

layer              owns                         failure mode
----------------   --------------------------   ---------------------
constraints        clocks, IO, exceptions       false violations
implementation     cells, nets, placement       real path delay
extraction         SPEF/RC corners              view mismatch
signoff policy     derate, MMMC matrix          margin disputes
closure           ECO order, regression        fix breaks other corner

STA deep dive

Coupling makes delay a function of neighbors, not just wire RC.

Concept diagram

SI ON VICTIM

victim net delay = base_RC + coupling_from_aggressors

Metric graph

DELTA DELAY ON CRITICAL PATHS

no SI   ████████  1.2ns
with SI ██████████  1.35ns  (+150ps)

Reports and artifacts

• delta delay report

• aggressor list

• noise peaks

• SI WNS delta

Mini case study

Setup fixed by upsize but SI worsened — spacing ECO on bus bits recovered margin.

Debug branches

• Re-run SI after every timing ECO

• Shield wide switching buses

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

• State corner, mode, view, and database tag with every slack claim.

• Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

• Comparing STA runs with different SPEF or SDC tags.

• Broad false_path to green-wash violations.

• Setup-only ECO without hold check.

Mechanism deep dive

Coupling capacitance between adjacent nets changes effective delay; aggressors slow or speed victims depending on switching alignment.