Delta Delay Mechanism: Pitfalls & Red Flags

Pitfalls and red flags

Pitfalls & Red Flags for Delta Delay Mechanism focuses on delta delay on critical paths, aggressor count, SI WNS impact. The goal is to connect the observable symptom to timing mechanism, ownership, and regression risk.

• A path looks clean in one view but fails in signoff SPEF.

• The SDC allows behavior that the implementation team assumed was illegal.

• A generated_clock definition shifts capture edge silently.

• Hold fails on short paths after setup-focused ECO.

• The fix improves one corner but regresses another MMMC scenario.

Layer responsibility check

STA OWNERSHIP LAYERS — Delta Delay Mechanism

layer              owns                         failure mode
----------------   --------------------------   ---------------------
constraints        clocks, IO, exceptions       false violations
implementation     cells, nets, placement       real path delay
extraction         SPEF/RC corners              view mismatch
signoff policy     derate, MMMC matrix          margin disputes
closure           ECO order, regression        fix breaks other corner

STA deep dive

Coupling makes delay a function of neighbors, not just wire RC.

Concept diagram

SI ON VICTIM

victim net delay = base_RC + coupling_from_aggressors

Metric graph

DELTA DELAY ON CRITICAL PATHS

no SI   ████████  1.2ns
with SI ██████████  1.35ns  (+150ps)

Reports and artifacts

• delta delay report

• aggressor list

• noise peaks

• SI WNS delta

Mini case study

Setup fixed by upsize but SI worsened — spacing ECO on bus bits recovered margin.

Debug branches

• Re-run SI after every timing ECO

• Shield wide switching buses

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

• State corner, mode, view, and database tag with every slack claim.

• Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

• Comparing STA runs with different SPEF or SDC tags.

• Broad false_path to green-wash violations.

• Setup-only ECO without hold check.

Principal STA review addendum

Coupling capacitance between adjacent nets changes effective delay; aggressors slow or speed victims depending on switching alignment.

Metric: delta delay on critical paths, aggressor count, SI WNS impact