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Course contents

  • Logic Synthesis Glossary
  • Logic Synthesis Cheatsheet
  • Synthesis Foundations14
  • Logic Optimisation and Mapping20
  • Constraints and Timing15
  • Sequential, FSM and Memory19
  • Datapath Synthesis14
  • Area, Power and Test14
  • Verification, ECO and Handoff15
    • Equivalence Checking
    • Incremental Compile and ECO
      • Re-run or Patch
      • Logic Cone Isolation
      • ECO Netlist Edits
      • Hierarchy and dont_touch
      • Equivalence and QoR Regression
    • Physical-Aware Synthesis and Handoff
  • Flows and Debugging15
  • Interview and Judgment11
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‹Incremental Compile and ECO
  1. Topics
  2. Logic Synthesis
  3. Verification, ECO and Handoff
  4. Incremental Compile and ECO
  5. ECO Netlist Edits

Part 7 · Verification, ECO and Handoff · Intermediate

ECO Netlist Edits

Spare cells, rewiring, and resizing: the three netlist edits behind an ECO.

On this page

    Three ECO edits

    Most ECO patches combine three edits. Spare cells add logic, rewiring moves connections, and resizing swaps a cell for an equivalent one.

    All three keep the rest of the netlist untouched. The table below fixes each edit with one example.

    Edit

    What changes

    Example

    Spare-cell use

    An unused cell is wired into the cone

    A spare NAND2 becomes the new AND term.

    Rewire

    A net source or load changes, cell count unchanged

    A load moves from the old net to the spare-cell output.

    Resize

    A cell is swapped for an equivalent gate

    A gate is exchanged to trade area against delay.

    Isolating the cone in Yosys

    The script below builds a two-output block with disjoint cones. In this disjoint toy the global per-type counts coincide with per-cone membership, and a general cone check selects by fanin from each output.

    yosys
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    read_verilog <<EOV
    module eco_cone(input wire a, b, c, output wire y1, y2);
    wire n1 = a & b;
    assign y1 = n1 | c;
    assign y2 = a ^ b;
    endmodule
    EOV
    hierarchy -check -top eco_cone
    proc
    flatten
    opt
    techmap
    opt_clean
    check
    select -assert-count 1 t:$_AND_
    select -assert-count 1 t:$_OR_
    select -assert-count 1 t:$_XOR_
    select -assert-count 2 t:$_AND_ t:$_OR_
    select -assert-none t:$_MUX_
    log PASS: y1 cone holds 2 cells and y2 cone holds 1 cell with no mux cells

    In this disjoint toy the y1 cone holds the AND and OR cells, 2 in total. The y2 cone holds the XOR cell, 1 in total, and no MUX cell appears anywhere.

    Sizing the spare pool

    Spare cells are placed before the change is known. The pool must cover the planned edits with margin.

    Diagram
    EXAMPLE parameters (not tool defaults): 200 spare cells per block
    first ECO edit consumes 3 cells: 200 - 3 = 197 remain
    second ECO edit consumes 2 cells: 197 - 2 = 195 remain
    used after both edits = 3 + 2 = 5 of 200 = 5 / 200 = 2.5%
    rule used here: stop patching and re-run when the pool cannot cover the next edit

    Common mistakes

    Common pitfall

    An ECO script that names cells from an old report breaks after re-optimisation renames them. Select cells by cone and function instead of by stale names.

    Interview

    Likely probes: edit choice and spare planning.

    • Rewiring moves connections without adding cells, so it fits the smallest changes.

    • Spare cells bound the patch: the pool minus consumed cells is what remains.

    • Resizing trades area against delay inside an already placed cone.

    Check yourself The y1 cone holds 2 cells and the y2 cone holds 1 cell. An ECO rewires the OR cell. Which cone needs re-proof?

    The y1 cone, which holds the edited cell. In practice the whole block is re-proven, since a misidentified cone is itself a bug.

    Check yourself A spare pool holds 197 cells and the next edit needs 3. Patch or re-run?

    Patch. The pool covers 3 cells with 194 left, so the patch fits.

    Related topics

    • Hierarchy and dont_touch

    • Debugging QoR

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    See also

    • Re-run or Patch
    • Equivalence and QoR Regression