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Course contents

  • Logic Synthesis Glossary
  • Logic Synthesis Cheatsheet
  • Synthesis Foundations14
  • Logic Optimisation and Mapping20
  • Constraints and Timing15
  • Sequential, FSM and Memory19
  • Datapath Synthesis14
  • Area, Power and Test14
  • Verification, ECO and Handoff15
    • Equivalence Checking
    • Incremental Compile and ECO
      • Re-run or Patch
      • Logic Cone Isolation
      • ECO Netlist Edits
      • Hierarchy and dont_touch
      • Equivalence and QoR Regression
    • Physical-Aware Synthesis and Handoff
  • Flows and Debugging15
  • Interview and Judgment11
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‹Incremental Compile and ECO
  1. Topics
  2. Logic Synthesis
  3. Verification, ECO and Handoff
  4. Incremental Compile and ECO
  5. Equivalence and QoR Regression

Part 7 · Verification, ECO and Handoff · Intermediate

Equivalence and QoR Regression

Re-proving equivalence after an ECO and checking QoR against guardbands.

On this page

    Proof after every patch

    An ECO changes the netlist, so the previous equivalence result no longer applies. The patched netlist is compared against the RTL again with a miter before signoff.

    The comparison covers the whole design, not just the edited cone. A wrong cone selection is itself a bug the full check catches.

    A worked QoR regression check

    Small RTL changes can still move area and delay. Guardbands below are stated EXAMPLE values, not tool defaults.

    Diagram
    EXAMPLE guardbands (not tool defaults): area may grow at most 2%, delay may grow at most 1%
    baseline (stated EXAMPLE values): 100 area units, 10.00 ns output arrival
    after ECO: 101 area units, 10.05 ns arrival
    area change = 101 - 100 = 1 of 100 = 1%, within the 2% guardband
    delay change = 10.05 - 10.00 = 0.05 of 10.00 = 0.5%, within the 1% guardband
    verdict: the ECO passes both regression checks
    the added unit: 1 spare NAND2 at 2 units minus 1 removed INV at 1 unit = 2 - 1 = 1 unit

    Common mistakes

    Common pitfall

    Treating a passing regression check as proof of correctness. Guardbands measure quality only, and only equivalence proves the function survived.

    Interview

    Likely probes: proof and regression after a patch.

    • Every patch ends with full-design equivalence, never cone-only trust.

    • The worked ECO passes at 1% area growth and 0.5% delay growth.

    • A proof pass with a missed guardband is a contract miss, not a pass.

    Check yourself Equivalence passes but area grows 3% against a 2% guardband. Is the ECO done?

    No. Function is proven, but the quality contract is missed, so the patch needs rework or signed-off acceptance.

    Check yourself The ECO touched one cone and its cone check passes. Why run full-design equivalence?

    The cone partition may be wrong. Full-design proof covers the edit and the assumption together.

    Related topics

    • Equivalence Checking

    • See also: Formal course hub

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    See also

    • Re-run or Patch
    • Logic Cone Isolation
    • ECO Netlist Edits