Part 8 · Checking & Coverage · Intermediate
Message IDs and Verbosity Control
Stable ID naming, verbosity levels, plusargs, and per-component set_verbosity.
Message IDs — the filter key
Every UVM message carries a string ID — the primary key for selective verbosity control. Good IDs are stable, specific, and grep-friendly. They enable turning up debug on one component without flooding the log from the entire environment.
// GOOD IDs — specific, stable, grep-friendly
`uvm_error("SCB_MISMATCH", "addr 0x%0h exp=%0h act=%0h", addr, exp, act)
`uvm_error("SCB_UNEXPECTED","id %0h no expected entry", id)
`uvm_fatal("NOVIF_APB", "apb_vif not set in config_db")
`uvm_info("SCB", "matched id=%0h", id, UVM_HIGH)
`uvm_info("RAL_PRED", "predict addr=0x%0h data=0x%0h", addr, data, UVM_FULL)
// BAD IDs — useless for filtering
`uvm_error("ERR", "something failed")
`uvm_info("DBG", "value = %0d", val, UVM_NONE)Verbosity ladder
Legend: [UVM]
VERBOSITY LADDER (lowest → highest)
UVM_NONE ──► Always prints (used for PASS/FAIL result messages)
│
UVM_LOW ──► Phase transitions, report_phase summaries, coverage %
│
UVM_MEDIUM ──► Standard regression level — key events, error context
│
UVM_HIGH ──► Per-transaction debug — scoreboard match/mismatch
│
UVM_FULL ──► Detailed field dumps — register writes, TLM connections
│
UVM_DEBUG ──► Everything — factory overrides, config_db sets
Print rule: message prints if message_verbosity <= component threshold
Example: UVM_HIGH message prints at UVM_MEDIUM threshold? NO (HIGH > MEDIUM)
UVM_HIGH message prints at UVM_FULL threshold? YES (HIGH <= FULL)Controlling verbosity
// In component build_phase — set default for this component
set_report_verbosity_level(UVM_MEDIUM);
// Per-ID override — only SCB messages at HIGH
set_report_id_verbosity("SCB", UVM_HIGH);
// Per-ID suppress — silence VIP noise entirely
set_report_id_verbosity("VIP_INTERNAL", UVM_NONE);# Global verbosity via plusarg
simv +UVM_VERBOSITY=UVM_MEDIUM
# Per-component at time 0 (before run_phase)
simv +uvm_set_verbosity=uvm_test_top.env.scb,_ALL_,UVM_HIGH,time
# Per-component + per-ID
simv +uvm_set_verbosity=uvm_test_top.env.scb,SCB,UVM_FULL,run
# Suppress all, then enable one component
simv +uvm_set_verbosity=*,_ALL_,UVM_NONE,time \
+uvm_set_verbosity=uvm_test_top.env.scb,_ALL_,UVM_HIGH,timeRegression vs debug verbosity guide
Use case Recommended verbosity
──────────────────────────────────────────────────────────
Regression batch UVM_MEDIUM (default)
Single test debug UVM_HIGH on failing component only
Register/RAL debug UVM_FULL on reg predictor component
Factory/config debug UVM_DEBUG (brief, targeted)
PASS/FAIL result line UVM_NONE (always visible)Key takeaways
IDs enable selective debug; verbosity controls uvm_info volume.
Regression at UVM_MEDIUM; raise to UVM_HIGH on failing component only.
UVM_NONE for result messages — always visible regardless of threshold.
Common pitfalls
Generic ID "ERR" everywhere — cannot filter selectively in regression.
UVM_FULL globally in regressions — log files grow to gigabytes.
UVM_NONE on debug messages — floods log even at UVM_MEDIUM threshold.