20 monitor/driver interview questions.
[INT][SENIOR][UVM-CODE]
Q: Passive vs active monitor?
A:
Passive: observe only. Active: may drive via BFMs — rare in UVM monitor.
FOLLOW-UP TRAP: Driver inside monitor for production TB.[INT][SENIOR][UVM-CODE]
Q: Clocking block in monitor?
A:
Sample inputs in clocking block or @(posedge) — consistent sampling.
FOLLOW-UP TRAP: Race between signals without clocking.[INT][SENIOR][UVM-CODE]
Q: Monitor reconstruct APB beat?
A:
FSM: IDLE→SETUP→ACCESS; pack addr/data/resp per beat.
FOLLOW-UP TRAP: Missing wait for PREADY.[INT][SENIOR][UVM-CODE]
Q: Byte lanes on AXI-lite?
A:
Use strb/keep to mask compare lanes; align to byte addresses.
FOLLOW-UP TRAP: Full-word compare on narrow transfer.[INT][SENIOR][UVM-CODE]
Q: Driver forever loop structure?
A:
forever begin seq_item_port.get_next_item(req); drive; item_done(); end
FOLLOW-UP TRAP: No item_done — sequencer hang.[INT][SENIOR][UVM-CODE]
Q: req/rsp handshake?
A:
Driver may use rsp_port.put(rsp) after drive; seq waits get_response.
FOLLOW-UP TRAP: Blocking driver without rsp path.[INT][SENIOR][UVM-CODE]
Q: Monitor analysis port when?
A:
write(txn) after beat complete — not mid-state unless partial logging intended.
FOLLOW-UP TRAP: Multiple writes per beat confusing scoreboard.[INT][SENIOR][UVM-CODE]
Q: Virtual interface in monitor?
A:
vif from config_db in build/connect; assign to modport.
FOLLOW-UP TRAP: Null vif — config path wrong.[INT][SENIOR][UVM-CODE]
Q: Reset in monitor?
A:
Reset FSM to IDLE; optionally flush txn. Align with DUT reset.
FOLLOW-UP TRAP: Emit txn across reset boundary.[INT][SENIOR][UVM-CODE]
Q: Driver backpressure?
A:
Wait ready before next beat; seq may stall on get_next_item.
FOLLOW-UP TRAP: Drive when not ready — protocol violation.[INT][SENIOR][UVM-CODE]
Q: Monitor coverage hooks?
A:
Cover states, cross addr×resp — in monitor or subscriber.
FOLLOW-UP TRAP: Coverage in driver — couples drive/check.[INT][SENIOR][UVM-CODE]
Q: Split monitor driver agent?
A:
Agent: monitor + driver + sequencer if active; connect TLM in connect_phase.
FOLLOW-UP TRAP: Monitor in env without agent wrapper.[INT][SENIOR][UVM-CODE]
Q: AXI ID in monitor txn?
A:
Capture ID on addr and attach to resp beat for OOO scoreboard.
FOLLOW-UP TRAP: Resp without ID tag.[INT][SENIOR][UVM-CODE]
Q: Monitor error injection?
A:
Usually sequences/drivers; monitor may flag protocol errors.
FOLLOW-UP TRAP: Monitor modifying bus.[INT][SENIOR][UVM-CODE]
Q: Whiteboard monitor in 12 min?
A:
FSM diagram + run_phase loop + analysis_port write.
FOLLOW-UP TRAP: Full protocol before one beat path.[INT][SENIOR][UVM-CODE]
Q: Driver parameterization?
A:
cfg object via config_db for timing, widths.
FOLLOW-UP TRAP: Hardcoded delays in driver.[INT][SENIOR][UVM-CODE]
Q: Monitor vs interface assertion?
A:
Monitor for txn stream; SVA for cycle rules — complementary.
FOLLOW-UP TRAP: Replacing SVA with monitor checks only.[INT][SENIOR][UVM-CODE]
Q: Multiple monitors one agent?
A:
Separate analysis ports or merged txn — document policy.
FOLLOW-UP TRAP: Duplicate txn streams.[INT][SENIOR][UVM-CODE]
Q: Sequencer-Driver connection?
A:
driver.seq_item_port.connect(sequencer.seq_item_export);
FOLLOW-UP TRAP: Wrong port type blocking vs analysis.[INT][SENIOR][UVM-CODE]
Q: Monitor reconstruct without spec?
A:
Ask clarifying protocol; start with valid/ready or PSEL/PENABLE.
FOLLOW-UP TRAP: Guessing wrong protocol.