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Course contents

  • Start Here4
  • UVM Foundations14
  • UVM Phases & Simulation Lifecycle26
  • Factory & Configuration15
  • Transaction-Level Modeling (TLM)13
  • UVM Sequences & Stimulus21
  • UVM Agents & Protocol VIP21
  • Environment & Test Classes11
  • Checking & Coverage in UVM21
  • UVM Register Abstraction Layer (RAL)22
  • Advanced UVM in Practice13
  • Debug & Regression10
  • Coding Practice47
    • How to Use This Course
    • Whiteboard Delivery Framework
    • Scoreboard Coding
    • Monitor & Driver Coding
      • Monitor Reconstruct Beat
      • Monitor Protocol FSM
      • Driver get_next_item Loop
      • Driver Response Handshake
      • Monitor & Driver Tricky Q&A
    • Sequences Coding
    • TLM & Analysis
    • RAL & Adapters
    • Factory & config_db
    • Phases & Objections
    • Env & Test Architecture
    • Debug Broken Testbench
    • Mock Interview Sets
    • Senior UVM Coding Cheat Sheet
  • Verification in Industry Practice10
  • Senior Prep: Architecture, Leadership and Interviews32
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←Monitor & Driver Coding
  1. Topics
  2. UVM Verification
  3. Coding Practice
  4. Monitor & Driver Coding
  5. Monitor Reconstruct Beat
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    UVM Coding PracticeSenior

    Monitor Reconstruct Beat

    Byte lanes, valid/ready, packing one protocol beat into a txn.

    Interview prompt

    Reconstruct one APB read beat from PSEL/PENABLE/PREADY signals into an apb_txn.

    Diagram
    WHITEBOARD CHAIN
    
    1. DECLARE    interfaces / types / ports you need
    2. SKELETON   class extends + utils macro + key methods
    3. MECHANISM  fill one critical method while narrating
    4. PITFALL    name one bug juniors make on this pattern
    5. TEST       how you would smoke-test the component

    Reference sketch (≤40 lines)

    design.sv
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    task run_phase(uvm_phase phase);
      forever begin
        @(posedge vif.clk);
        if (vif.psel && !vif.penable) state = SETUP;
        if (state == SETUP && vif.penable && vif.pready) begin
          txn t = apb_txn::type_id::create("t");
          t.addr = vif.paddr; t.data = vif.prdata; t.write = 0;
          ap.write(t);
          state = IDLE;
        end
      end
    endtask

    Smoke test (5 minutes)

    • One read on bus — one analysis txn.

    • Wave matches txn fields.

    Code lab drill

    After reading, try Code lab exercise uvm-l8-int-monitor-beat — topic reference: /topics/uvm/coding-practice/monitor-driver/monitor-reconstruct-beat

    Common pitfalls

    • Missing PREADY wait.

    • Sampling wrong clock edge.

    • No write bit on txn.

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    See also

    • Monitor Protocol FSM
    • Driver get_next_item Loop
    • Driver Response Handshake