CDC / RDC · All levels

Multi-bit CDC Hazards: Interview Drills

Interview Drills for Multi-bit CDC Hazards.

Interview drills

Interview Drills for Multi-bit CDC Hazards focuses on data coherence violations, reconvergence warning count, escaped protocol bugs. The goal is to convert issue observations into mechanism-backed closure decisions.

diagram
PROMPT
You see data coherence violations, reconvergence warning count, escaped protocol bugs in Multi-bit CDC Hazards. Explain root cause and signoff decision.

STRONG ANSWER
1. Names crossing/reset class and context.
2. Explains Independent bit synchronization causes skew and data incoherency; buses need protocolized transfer (FIFO, handshake, token, or encoded sequencing).
3. Requests bus crossing inventory, reconvergence report, protocol assumptions doc.
4. Chooses fix/waiver/escalation with regression plan.

WEAK ANSWER
Lists tool commands or generic advice without mechanism and risk framing.

Diagram to draw on whiteboard

Bus incoherency hazard

diagram
bus[3:0] bits cross independently

sample N : 0 1 1 0
sample N+1: 1 0 0 1   (illegal mixed state)

Need protocol or encoded transfer, not per-bit sync.

Debug tree to narrate

diagram
ROOT-CAUSE TREE — Multi-bit CDC Hazards

crossing failure observed
        |
   reproducible?
     /        \
   no          yes
   |            |
stress mode   classify issue
expansion       /      |      \
            synchronizer protocol reset/reconvergence
                 |         |           |
            MTBF fit    liveness    release ordering

CDC/RDC deep dive

Metastability is managed risk, not eliminated risk.

Concept diagram

diagram
METASTABILITY FLOW

async event -> first sample may metastabilize
 -> settle window
 -> downstream sample confidence

Metric graph

diagram
MTBF TREND

target MTBF ---------
current design   ____/

Reports and artifacts

  • MTBF assumptions

  • synchronizer inventory

  • crossing class summary

  • critical waivers

Mini case study

Pulse sync chosen for a level signal caused intermittent stuck state under voltage stress.

Debug branches

  • Validate crossing class first

  • Check pulse width assumptions

  • Audit synchronizer template usage

Senior review question

Ask: what evidence proves this risk is closed for silicon, not just tool-clean?

Key takeaways

  • State crossing class, assumptions, and owner with every issue.

  • Run structural and dynamic regressions after each fix.

Common pitfalls

  • Treating all warnings as equivalent risk.

  • Waiving issues without containment evidence.

  • Skipping reset and reconvergence stress after CDC fixes.

Principal CDC/RDC review addendum

Independent bit synchronization causes skew and data incoherency; buses need protocolized transfer (FIFO, handshake, token, or encoded sequencing).

Metric: data coherence violations, reconvergence warning count, escaped protocol bugs