CDC / RDC · All levels
Multi-bit CDC Hazards: Step-by-Step Walkthrough
Step-by-Step Walkthrough for Multi-bit CDC Hazards.
Step-by-step analysis walkthrough
Use this sequence when owning Multi-bit CDC Hazards in a signoff review.
Inspect warning class and severity.
Trace crossing endpoints and domains.
Check protocol/reset assumptions against spec.
Review synchronizer or FIFO implementation detail.
Run focused assertion or formal check.
Draft fix options with risk and schedule impact.
Execute regression and publish closure memo.
Artifacts to collect
bus crossing inventory, reconvergence report, protocol assumptions doc
crossing inventory
waiver board notes
regression report
Decision memo template
CDC/RDC DECISION MEMO — Multi-bit CDC Hazards
risk class:
mechanism:
evidence:
fix/waiver:
owners: RTL owner, CDC owner, IP integration ownerReference visuals
Bus incoherency hazard
bus[3:0] bits cross independently
sample N : 0 1 1 0
sample N+1: 1 0 0 1 (illegal mixed state)
Need protocol or encoded transfer, not per-bit sync.CDC/RDC deep dive
Metastability is managed risk, not eliminated risk.
Concept diagram
METASTABILITY FLOW
async event -> first sample may metastabilize
-> settle window
-> downstream sample confidenceMetric graph
MTBF TREND
target MTBF ---------
current design ____/Reports and artifacts
MTBF assumptions
synchronizer inventory
crossing class summary
critical waivers
Mini case study
Pulse sync chosen for a level signal caused intermittent stuck state under voltage stress.
Debug branches
Validate crossing class first
Check pulse width assumptions
Audit synchronizer template usage
Senior review question
Ask: what evidence proves this risk is closed for silicon, not just tool-clean?
Key takeaways
State crossing class, assumptions, and owner with every issue.
Run structural and dynamic regressions after each fix.
Common pitfalls
Treating all warnings as equivalent risk.
Waiving issues without containment evidence.
Skipping reset and reconvergence stress after CDC fixes.
Principal CDC/RDC review addendum
Independent bit synchronization causes skew and data incoherency; buses need protocolized transfer (FIFO, handshake, token, or encoded sequencing).
Metric: data coherence violations, reconvergence warning count, escaped protocol bugs