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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
    • Event Scheduling Puzzles
    • Race Condition Puzzles
    • Clocking Block Puzzles
    • Semaphore & Mailbox Puzzles
      • Lock Held Across Blocking Response Wait
      • Bounded Mailbox put Deadlock
      • try_get Busy Spin at Time 0
      • Leaked Semaphore Token on Error Path
      • Two Consumers Waiting on One Mailbox
      • Deadlock-Free Request Loop with try_put/try_get
    • Concurrency & Timing Puzzles: Tricky Q&A
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Concurrency & Timing Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. Concurrency & Timing Puzzles
  4. Semaphore & Mailbox Puzzles

VLSI DV Interview Puzzles · All levels

Semaphore & Mailbox Puzzles

These puzzles model real bench hangs where nothing crashes but progress stops. The key skill is drawing wait-for graphs across semaphore tokens and mailbox blocking behavior, including `try_*` APIs and bounded queues.

  • 6topics
  • 6lessons

Topics in this section

  1. 1Lock Held Across Blocking Response Wait1 lesson
  2. 2Bounded Mailbox put Deadlock1 lesson
  3. 3try_get Busy Spin at Time 01 lesson
  4. 4Leaked Semaphore Token on Error Path1 lesson
  5. 5Two Consumers Waiting on One Mailbox1 lesson
  6. 6Deadlock-Free Request Loop with try_put/try_get1 lesson
On this page

    About this puzzle set

    These puzzles model real bench hangs where nothing crashes but progress stops. The key skill is drawing wait-for graphs across semaphore tokens and mailbox blocking behavior, including `try_*` APIs and bounded queues.

    Puzzles in this topic

    Diagram
    1. Lock Held Across Blocking Response Wait  [Medium]
    2. Bounded Mailbox put Deadlock  [Hard]
    3. try_get Busy Spin at Time 0  [Easy]
    4. Leaked Semaphore Token on Error Path  [Medium]
    5. Two Consumers Waiting on One Mailbox  [Hard]
    6. Deadlock-Free Request Loop with try_put/try_get  [Medium]

    Work each puzzle before reading the solution: predict the exact output or answer, name the rule that governs it, then check yourself.

    SV scheduling regions at puzzle scale

    Diagram
    SYSTEMVERILOG EVENT REGIONS (SIMPLIFIED ORDER)
    
    time slot T
       |
       +--> ACTIVE   : blocking statements, RHS sampling
       +--> INACTIVE : #0 queued work
       +--> NBA      : non-blocking LHS updates commit
       +--> OBSERVED : assertions sample stable design values
       +--> REACTIVE : testbench/program reaction code
    
    If behavior looks impossible, ask: "Which region saw which value?"

    Related topics

    • Concurrency & Timing Puzzles section

    • VLSI DV Interview Puzzles hub

    PreviousNext: Lock Held Across Blocking Response Wait

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    See also

    • Event Scheduling Puzzles
    • Race Condition Puzzles
    • Clocking Block Puzzles