VLSI DV Interview Puzzles · All levels

Out-of-Order Responses Miscompared as Corruption

Burst test shows intermittent mismatches, but waveform indicates DUT data is valid. Protocol allows response reordering by txn_id.

Puzzle

Difficulty: Medium · Puzzle 1 of 6 · Topic: Scoreboard Puzzles: Mismatch or Ordering Bug?

Burst test shows intermittent mismatches, but waveform indicates DUT data is valid. Protocol allows response reordering by txn_id.

Code

systemverilog
class my_scoreboard extends uvm_component;
  uvm_tlm_analysis_fifo #(txn) exp_fifo;
  uvm_tlm_analysis_fifo #(txn) got_fifo;
  virtual task run_phase(uvm_phase phase);
    txn exp, got;
    forever begin
      exp_fifo.get(exp);
      got_fifo.get(got);
      if (!exp.compare(got))
        \`uvm_error("SB", $sformatf("Mismatch exp=%s got=%s", exp.sprint(), got.sprint()));
    end
  endtask
endclass

Hint

FIFO-to-FIFO compare assumes strict in-order protocol.

Step-by-step solution

diagram
1) Confirm protocol ordering guarantees for response channel.
2) Add txn_id to mismatch logs and show IDs are permuted, not corrupted.
3) Replace strict queue compare with associative matching by stable key (txn_id).
4) Keep timeout tracking for missing counterpart transactions.
5) Add directed out-of-order test to lock behavior.

Answer

Answer: Bug: scoreboard assumes in-order compare while DUT legally reorders by txn_id. Fix: match expected/actual by transaction identity instead of queue position.

Why candidates get it wrong

A data mismatch message can be a checker policy bug, not a DUT functional bug.

Interviewer follow-up

What should the scoreboard do if two actual transactions arrive with the same txn_id?

Related topics