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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
    • Testbench Debug Puzzles: Why Did the Test Hang?
    • Deadlock Scenario Puzzles: Objection and Phase Stalls
    • Scoreboard Puzzles: Mismatch or Ordering Bug?
      • Out-of-Order Responses Miscompared as Corruption
      • Missing First Transaction After Reset
      • Duplicate Transactions from Handle Reuse
      • Mismatch Cascade from Incorrect Pop Policy
      • End-of-Test Draining Missing
      • Duplicate Expected Entries from Predictor Retry Path
    • Real Interview Rounds: End-to-End Debug Walkthrough
    • Scenario & Debug Puzzles: Tricky Q&A
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Scoreboard Puzzles: Mismatch or Ordering Bug?
  1. Topics
  2. DV Interview Puzzles
  3. Scenario & Debug Puzzles
  4. Scoreboard Puzzles: Mismatch or Ordering Bug?
  5. End-of-Test Draining Missing

VLSI DV Interview Puzzles · All levels

End-of-Test Draining Missing

Random tests fail with 'expected queue not empty' in about 2% seeds. DUT has variable response latency and can legally return after stimulus stops.

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    Puzzle

    Difficulty: Hard · Puzzle 5 of 6 · Topic: Scoreboard Puzzles: Mismatch or Ordering Bug?

    Random tests fail with 'expected queue not empty' in about 2% seeds. DUT has variable response latency and can legally return after stimulus stops.

    Code

    design.sv
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    task run_phase(uvm_phase phase);
      forever begin
        compare_once();
      end
    endtask
    
    function void check_phase(uvm_phase phase);
      if (exp_q.size() != 0 || got_q.size() != 0)
        \`uvm_error("SB", "leftover transactions");
    endfunction

    Hint

    A scoreboard needs explicit drain policy when response latency is elastic.

    Step-by-step solution

    Diagram
    1) Log queue sizes near end-of-test and observe they are shrinking but not yet zero.
    2) Confirm no drain window exists between stimulus completion and final check.
    3) Implement phase_ready_to_end wait/drain with bounded timeout and progress checks.
    4) Keep objection until queues settle or timeout indicates real hang.
    5) Track residual ids in timeout message for actionable debug.

    Answer

    Answer: Bug: scoreboard checks leftovers immediately without allowing legal late responses to drain. Fix: add bounded end-of-test draining before final emptiness assertion.

    Why candidates get it wrong

    Removing the check hides escapes; the right fix is controlled drain, not silence.

    Interviewer follow-up

    What timeout heuristic would you use so drain does not mask real deadlocks?

    Related topics

    • Back to Scoreboard Puzzles: Mismatch or Ordering Bug?

    • Scenario & Debug Puzzles section

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    See also

    • Out-of-Order Responses Miscompared as Corruption
    • Missing First Transaction After Reset
    • Duplicate Transactions from Handle Reuse