Physical Design · All levels
Clock Tree Synthesis Tricky Q&A
20+ senior Clock Tree Synthesis interview questions.
Q&A bank
Answer with mechanism, pitfall, regression check, and release judgment. At 10+ years, a correct definition is not enough.
Senior answer rubric
Start with the failing metric and analysis context.
Explain the physical or constraint mechanism.
Name the cheapest evidence-gathering experiment.
Choose a bounded fix and state what it can regress.
Close with signoff, waiver, or escalation criteria.
Why can clock latency violations appear with acceptable skew?
[INT][PD]
Q: Why can clock latency violations appear with acceptable skew?
A:
Latency measures absolute arrival delay, while skew measures relative sink spread; one can fail without the other.
FOLLOW-UP TRAP: Treating both metrics as interchangeable.How do you prioritize CTS goals under tight power budget?
[INT][PD]
Q: How do you prioritize CTS goals under tight power budget?
A:
Protect required skew/transition minima first, then optimize latency and buffer count within mode-specific constraints.
FOLLOW-UP TRAP: Minimizing buffers before honoring skew requirements.What is a robust check for ICG correctness?
[INT][PD]
Q: What is a robust check for ICG correctness?
A:
Validate glitch-safe cell type, enable timing, test override behavior, and gated-domain skew together.
FOLLOW-UP TRAP: Checking only gated clock connectivity.When is useful skew likely a bad idea?
[INT][PD]
Q: When is useful skew likely a bad idea?
A:
When hold margin is already thin or variation sensitivity is high in neighboring paths.
FOLLOW-UP TRAP: Applying useful skew to every setup violation.How do you verify generated clock definitions are complete?
[INT][PD]
Q: How do you verify generated clock definitions are complete?
A:
Trace each generated clock to source, divide/mux logic, and active modes, then reconcile with CTS root reports.
FOLLOW-UP TRAP: Assuming synthesis clocks are automatically sufficient.Why is NDR compliance not enough for clock robustness?
[INT][PD]
Q: Why is NDR compliance not enough for clock robustness?
A:
Even compliant nets can suffer SI hotspots if shielding and aggressor context are poor.
FOLLOW-UP TRAP: Declaring success from rule attachment alone.How should post-CTS hold fixes be staged?
[INT][PD]
Q: How should post-CTS hold fixes be staged?
A:
Start with small data-delay fixes for minor violations, then escalate to structural/skew actions for severe clusters.
FOLLOW-UP TRAP: Using one aggressive fix strategy globally.What report pair is best for skew root-cause localization?
[INT][PD]
Q: What report pair is best for skew root-cause localization?
A:
Skew outlier report plus tree-depth/branch-balance report mapped to physical regions.
FOLLOW-UP TRAP: Using only aggregate skew histogram.Why must CTS be mode-aware?
[INT][PD]
Q: Why must CTS be mode-aware?
A:
Clock roots, mux selections, and gating behavior can differ by mode, invalidating single-mode assumptions.
FOLLOW-UP TRAP: Signoff from functional mode only.How can hold fixing hurt routability?
[INT][PD]
Q: How can hold fixing hurt routability?
A:
Excessive delay cell insertion increases congestion and route detours, especially in dense clusters.
FOLLOW-UP TRAP: Ignoring physical impact of hold ECO volume.What indicates a constraint-origin CTS warning?
[INT][PD]
Q: What indicates a constraint-origin CTS warning?
A:
Warnings tied to missing/invalid clock definitions, inconsistent case analysis, or unresolved generated clock lineage.
FOLLOW-UP TRAP: Editing tree topology before reading constraints.How do you avoid over-shielding clock routes?
[INT][PD]
Q: How do you avoid over-shielding clock routes?
A:
Target only sensitivity-ranked trunks and crossings; verify SI benefit versus congestion cost.
FOLLOW-UP TRAP: Applying blanket shielding.What is a practical CTS readiness gate before routing?
[INT][PD]
Q: What is a practical CTS readiness gate before routing?
A:
Skew/latency/transition compliance plus manageable post-CTS hold profile and no major constraint anomalies.
FOLLOW-UP TRAP: Proceeding on skew-only pass.Why classify hold violations by magnitude?
[INT][PD]
Q: Why classify hold violations by magnitude?
A:
Different severities require different interventions; classification prevents unnecessary invasive fixes.
FOLLOW-UP TRAP: Treating all negatives identically.How do you communicate skew budget decisions to reviewers?
[INT][PD]
Q: How do you communicate skew budget decisions to reviewers?
A:
Show domain targets, applied deltas, hold impact, and justification against closure objectives.
FOLLOW-UP TRAP: Stating skew changes without tradeoff evidence.What is a common failure in multi-clock CTS integration?
[INT][PD]
Q: What is a common failure in multi-clock CTS integration?
A:
Unintended grouping of asynchronous domains or missing mode-specific clock exclusions.
FOLLOW-UP TRAP: Assuming domain separation is automatic.How do SI-aware delays affect CTS debug?
[INT][PD]
Q: How do SI-aware delays affect CTS debug?
A:
They can expose delay shifts unseen in nominal timing, requiring NDR/shield policy adjustment.
FOLLOW-UP TRAP: Ignoring SI when skew passes.What minimum artifacts should CTS closure packet include?
[INT][PD]
Q: What minimum artifacts should CTS closure packet include?
A:
Constraint audit, skew/latency/transition reports, hold-fix summary, and SI impact evidence.
FOLLOW-UP TRAP: Submitting only top-line timing numbers.Why is branch depth imbalance risky?
[INT][PD]
Q: Why is branch depth imbalance risky?
A:
Deep uneven branches increase latency spread, transition issues, and variation sensitivity.
FOLLOW-UP TRAP: Focusing only on sink count.How do you narrate CTS debugging in an interview?
[INT][PD]
Q: How do you narrate CTS debugging in an interview?
A:
Explain metric classification, targeted report analysis, constrained fix, and regression proof across modes/corners.
FOLLOW-UP TRAP: Answering with tool-command lists.How to drill this Q&A bank
Use each question as a two-minute mock. The target answer is not an essay; it is a structured closure response with a metric, mechanism, risk, and follow-up check.
Answer template
MECHANISM: what physical effect or tool step is involved
WHEN: where it appears in the flow
PITFALL: one wrong junior answer
CHECK: report/map/checklist item that proves the answerScoring
5/5: metric, mechanism, experiment, regression, and release decision named without prompting.
4/5: technically correct and names regression, but misses ownership or escalation criteria.
3/5: correct concept but no decision framework.
1/5: tool command or buzzword with no mechanism.
Principal-level review bar
Q&A bank pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.
What excellent looks like
Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.
Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.
Chooses experiments by information gain and reversibility, not by habit.
States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.
Turns recurring failures into methodology guardrails, dashboards, or checklist items.
Closure note template
STAFF / PRINCIPAL CLOSURE NOTE
Context:
stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
tag: <database / netlist / SDC / library stack>
failing metric: <exact report line>
affected scope: <block / hierarchy / path group / power domain / region>
Hypotheses:
H1: <most likely physical or constraint mechanism>
H2: <competing explanation>
H3: <methodology or input-data issue>
Decision:
next experiment: <cheap check that can falsify H1>
fix candidate: <minimal reversible change>
rollback trigger: <metric that says the fix is wrong>
regression set: <timing / route / power / PV / DFT / package>
escalation owner: <team or reviewer>Tradeoffs a senior engineer must discuss
Technical tradeoff
CTS changes the timing problem by making clocks real. Explain not only the preferred fix, but what margin or schedule you are spending to get it.
Cross-team tradeoff
What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?
Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?
What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?
Leadership communication
"The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."Key takeaways
Always connect the concept back to a measurable signoff artifact.
A fix is not complete until you can name the regression checks.
Common pitfalls
Optimizing by habit instead of reading the current report.
Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.