PROMPT
You see hung transaction count, decode error count, timeout window on AMBA Integration Debug. Walk through root cause and fix.

STRONG ANSWER
1. Names the layer and transaction identity.
2. Explains most AMBA failures come from channel dependency, address map mismatch, reset timing, or width conversion mistakes.
3. Requests timeout trace, bridge log, interconnect route table, reset waveform.
4. Proposes one reduced sequence and one system regression.

WEAK ANSWER
Jumps to widening the interface, increasing FIFO depth, or blaming firmware without evidence.

WHERE AMBA HANGS COME FROM

master --AW--> [bridge] --AW--> interconnect --AW--> slave
         W  ->          W ->                  W ->
         <- B          <- B                  <- B

Checklist along the path:
  [ ] address decoded to a real slave?
  [ ] W beats match AW length?
  [ ] B response actually returned?
  [ ] reset released on BOTH sides before traffic?

ROOT-CAUSE TREE — AMBA Integration Debug

hung transaction count, decode error count, timeout window looks wrong
        |
   reproducible?
     /        \
   no          yes
   |            |
 flaky env   same first transaction every time?
 / seed         /            \
              yes             no
               |               |
        protocol rule     timing/reset/PVT
        or config bug     or load-dependent

AMBA INTEGRATION MAP

CPU --AXI--> NIC --AXI--> SRAM
  |              |
  +--AXI-Lite--> peripherals (GPIO, timers)
  +--AXI-Stream-> video pipe

Every bridge is a contract rewrite: width, ID, burst, cache attrs.

AXI CHANNEL ACTIVITY (mixed traffic)

AW+W     ████████████
AR       ████████████████
R        ██████████████
B        ████████

Read-heavy phase: AR/R dominate; write resp may look idle while system is healthy.