A tri-state driver can output 0, 1, or nothing (high impedance, z). Only one driver may speak at a time.
Pads use this sharing; the core uses muxes.
3 lessons, about 13 min
Simulation: z (and downstream logic usually turns it into x). Hardware: a floating, undefined voltage that can sit in the middle region and draw extra current. That is why a floating net needs a pull-up, pull-down or bus keeper.
The whole topic on one page, taken from each lesson's Remember box. Read it before an interview, or print it.
Tri-State Basics
A net has four values: 0, 1, z (nobody drives) and x (clash or unknown).
Two drivers that disagree on a bit give x; two that agree give that value.
Keep the output enable glitch-free, because a glitch while another device drives is a brief short.
Rule of thumb: enable one driver at a time, and make the enables one-hot.
Bus Holders, Floating Nets and Wired Logic
tri1 resolves to 1 and tri0 to 0 when undriven; drivers of 1 and 0 together still give x.
An open-drain device drives 0 or z, never a hard 1. The pull-up makes the 1.
A bare wand reads z when every driver releases, so it needs a pull-up too.
Rule of thumb: give every shared net a resting value.
When Not to Use Internal Tri-State in ASIC RTL
Reasons: timing analysis, scan test, contention, and tool or library support.
An AND-OR mux gives a known value when enables overlap (the OR of the words), so assert that at most one enable is active.
Tri-state belongs at the pads, in a small wrapper that gives the core separate data_in, data_out and data_oe.
Rule of thumb: keep tri-state at the pad ring and use muxes inside the core.
Mini project: a 32-bit leading-zero counter and normaliser
Practice question: Tri-state buffer and ASIC versus FPGA differences
Interview: run a mock interview on this topic