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Course contents

  • RTL Foundations36
  • Combinational Design25
  • Sequential Design27
  • FSM & Control27
  • Timing & Clocking39
  • Reset & CDC34
    • Reset Architecture
    • Metastability and Synchronisation
      • What Metastability Means in Practice
      • The Two-Flop Synchroniser
      • When to Use Three Flops
      • CDC Constraints and Implementation Hygiene
      • Do Not Synchronise Buses Bit by Bit
    • Asynchronous FIFO
    • CDC Protocols
    • Reset Domain Crossing
    • CDC Verification
  • Memory & Buses57
  • Advanced RTL28
  • Senior & Interview76
  • Glossary and Notation
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