Shift Registers and LFSRs · RTL Design

Part 3 · Sequential · Intermediate

Topics in this section

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A shift register moves one bit per clock through a chain of flip-flops. It underlies serial links, serializers and the LFSR.

A chain of four flip-flops from serial input to serial output.

A 4-bit shift register: one new bit enters per clock and every stored bit advances one position.

3 lessons, about 14 min

Serial and Parallel Data MovementYou can build a parallel-in serial-out and a serial-in parallel-out register, state the bit order, and weigh a serial link against a parallel bus.4 min
Universal Shift RegisterYou can build a four-mode universal shift register and tell it apart from a barrel shifter.4 min
LFSR for PRBS GenerationYou can build a maximal-length LFSR from a primitive polynomial, trace its state and serial output, and say what it is and is not used for.6 min

Check yourself How many clock cycles does it take to move one byte through an 8-bit serial link, and how many flip-flops does the receiver need?

8 clock cycles (one bit per cycle) and at least 8 flip-flops for the shift register, plus a small bit counter to know when the byte is complete.

The whole topic on one page, taken from each lesson's Remember box. Read it before an interview, or print it.

Serial and Parallel Data Movement

This page uses LSB-first order, as UART does; I2C data bytes go MSB-first.
The first bit sent lands in bit 0 of the receiver after W shifts.
A real link adds framing and a bit counter so the receiver knows where a byte begins.

Rule of thumb: agree bit order and shift direction in writing, and check each wire bit against the source byte.

Universal Shift Register

Each flop picks its own output, a neighbour or the parallel input.
Make the hold mode explicit, and use unique case so all four modes are covered.
It shifts one position per clock; a barrel shifter shifts any amount in one cycle.

LFSR for PRBS Generation

A primitive polynomial makes every nonzero seed visit all 2^n - 1 states before repeating.
The all-zero state never leaves with XOR feedback, so the seed must be nonzero.
Tap numbering, shift direction and the sampling point change the stream phase; agree on them before connecting a checker.

Rule of thumb: an LFSR suits test and scrambling, never secrets.

Lessons in this topic

3 lessons, about 14 min

Serial and Parallel Data MovementYou can build a parallel-in serial-out and a serial-in parallel-out register, state the bit order, and weigh a serial link against a parallel bus.4 min
Universal Shift RegisterYou can build a four-mode universal shift register and tell it apart from a barrel shifter.4 min
LFSR for PRBS GenerationYou can build a maximal-length LFSR from a primitive polynomial, trace its state and serial output, and say what it is and is not used for.6 min

Check yourself How many clock cycles does it take to move one byte through an 8-bit serial link, and how many flip-flops does the receiver need?

8 clock cycles (one bit per cycle) and at least 8 flip-flops for the shift register, plus a small bit counter to know when the byte is complete.

Revision sheet

The whole topic on one page, taken from each lesson's Remember box. Read it before an interview, or print it.

Serial and Parallel Data Movement

This page uses LSB-first order, as UART does; I2C data bytes go MSB-first.

The first bit sent lands in bit 0 of the receiver after W shifts.

A real link adds framing and a bit counter so the receiver knows where a byte begins.

Rule of thumb: agree bit order and shift direction in writing, and check each wire bit against the source byte.

Universal Shift Register

Each flop picks its own output, a neighbour or the parallel input.

Make the hold mode explicit, and use unique case so all four modes are covered.

It shifts one position per clock; a barrel shifter shifts any amount in one cycle.

LFSR for PRBS Generation

A primitive polynomial makes every nonzero seed visit all 2^n - 1 states before repeating.

The all-zero state never leaves with XOR feedback, so the seed must be nonzero.

Tap numbering, shift direction and the sampling point change the stream phase; agree on them before connecting a checker.

Rule of thumb: an LFSR suits test and scrambling, never secrets.