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Course contents

  • How to Use This Course
  • The NanoSoC Tour
  • Reading Path
  • SoC Glossary10
  • SoC Metrics Reference
  • SoC Cheatsheet
  • What SoC Integration Is12
  • Architecture and Budgets21
    • Partitioning and Hierarchy
    • Area Budgets
      • Area Roll-Up
      • Utilisation and Margin
      • How Area Budgets Move
    • Timing Budgets Across Hierarchy
    • Power Budgets
    • Bandwidth Budgets
    • Budget Governance
    • Multi-Die and Chiplet View
  • Memory Maps and Address Decode26
  • Interconnect and Bus Fabrics26
  • Clock and Reset Architecture24
  • Power Architecture21
  • Interrupts, DMA and Peripherals15
  • Memories, Boot and Security21
  • IP Integration and Handoff21
  • Top-Level Verification and Bring-up21
  • Package, Pads and I/O18
  • Chip Signoff and Tapeout18
  • SoC Interview Prep16
  • Capstone: Integrate NanoSoC14
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←Architecture and Budgets
  1. Topics
  2. SoC Design
  3. Architecture and Budgets
  4. Area Budgets

Part 2 of 14Part 2 of 14/Architecture and BudgetsAll levels

Area Budgets

Area roll-up from the NanoSoC specification, utilisation and margin, and how budgets move through the flow.

  • 3topics
  • 3lessons

Area is the most concrete budget in the section: every block reports a number, the numbers add, and the total either fits the die or it does not. NanoSoC's roll-up is fully worked — 0.585 mm2 of blocks, 0.070 mm2 of wiring overhead, a 0.655 mm2 core inside a 0.940 mm2 budget at 69.7% utilisation — and this topic teaches how to build that roll-up, how much margin to keep, and how the budget travels from spreadsheet to synthesis to floorplan without silently changing meaning.

Lesson

After it you can...

Area Roll-Up

Add the block table to the core total and prove the utilisation.

Utilisation and Margin

Set a utilisation target and size the margin for growth.

How Area Budgets Move

Track a budget through synthesis and layout and rebalance an overrun.

Suggested order: top to bottom. Roll the numbers up first, then learn what margin they need, then follow them through the flow. For the floorplan view of the same numbers see Die Size and Utilisation Targets; for budgeting across partitions see Budgeting Partitions and Their Interfaces.

Check yourself What are the three lines of an area roll-up?

Block subtotal, wiring and overhead allowance, and the core total against the die budget with utilisation. NanoSoC: 0.585 plus 0.070 equals 0.655 inside 0.940.

Expect to whiteboard an area roll-up from a block table and defend the overhead line. The numbers here are the worked example.

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See also

  • Partitioning and Hierarchy
  • Timing Budgets Across Hierarchy
  • Power Budgets