A partition is a promise about what the tools and the team can handle as one piece: one synthesis run, one owner, one timing budget, one power intent. NanoSoC could be built flat — 16 blocks (15 modules plus the PLL macro) is small enough — but it is partitioned anyway, along its clock domains, its power domains and its protocol boundaries, because those are the seams where independent work actually pays. This topic teaches how to choose those seams, what is allowed to cross them, and why feedthroughs are a design smell worth counting.
Lesson | After it you can... |
|---|---|
Say when a design earns hierarchy and price its cost. | |
Decide what crosses a boundary and remove a feedthrough. | |
Defend every NanoSoC partition from clock, power and protocol reasons. |
Suggested order: top to bottom. The first lesson decides whether hierarchy pays, the second polices the boundaries it creates, and the third applies both to NanoSoC. Where a boundary is also a clock domain boundary, the crossing rules come from CDC-Aware Partitioning. The physical side of the same decision lives in Partitioning a Block for Hierarchy; the RTL discipline in Top-down vs bottom-up integration.
Every signal crossing it needs synchronising, budgeting, verifying and documenting, so a boundary must save more in parallel work and tool capacity than it spends in interface effort.