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Course contents

  • How to Use This Course
  • The NanoSoC Tour
  • Reading Path
  • SoC Glossary10
  • SoC Metrics Reference
  • SoC Cheatsheet
  • What SoC Integration Is12
  • Architecture and Budgets21
  • Memory Maps and Address Decode26
  • Interconnect and Bus Fabrics26
  • Clock and Reset Architecture24
  • Power Architecture21
  • Interrupts, DMA and Peripherals15
  • Memories, Boot and Security21
  • IP Integration and Handoff21
  • Top-Level Verification and Bring-up21
  • Package, Pads and I/O18
    • I/O Ring and Pad Types
    • Pad Count and Simultaneous Switching
    • Package and Ballout
      • Package Types at a Conceptual Level
      • Ball Assignment Rules
      • Pinout Review and Escape Routing
    • Power Delivery Through Package and Bumps
    • ESD and Latch-Up at the Top
    • Test and Debug Pins (extension)
  • Chip Signoff and Tapeout18
  • SoC Interview Prep16
  • Capstone: Integrate NanoSoC14
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←Package, Pads and I/O
  1. Topics
  2. SoC Design
  3. Package, Pads and I/O
  4. Package and Ballout

Part 11 of 14Part 11 of 14/Package, Pads and I/OAll levels

Package and Ballout

Package types at a conceptual level, ball assignment rules, pinout review with the board team, escape routing constraints.

  • 3topics
  • 3lessons

The pad list is finished and counted; now each pad needs a ball, and the balls need an order the board can actually route. The package is the middle of that sandwich, and its choice constrains everything: how many balls exist, how much inductance each supply path carries, and how the board escapes the array. This topic chooses the package at the concept level, assigns the 31 balls by rule on a 6 x 6 array, and runs the review that catches the classic mismatch between the chip's map and the board's netlist.

Lesson

After it you can...

Package Types at a Conceptual Level

Choose a package family for NanoSoC and state what the choice costs.

Ball Assignment Rules

Assign every NanoSoC pad to a ball and check the assignment by script.

Pinout Review and Escape Routing

Pass a pinout review with the board team and catch a ball that moved on one side only.

Suggested order: top to bottom. The package first, because its ball count and inductance bound the assignment; then the assignment; then the review that proves the board can live with it. The power-delivery topic next door prices the supply paths this topic draws.

Check yourself Why is the ballout an integrator deliverable rather than a package-vendor drawing?

Because only the integrator sees both sides: which pad needs a quiet neighbour, which supply needs a short path, and which ball the board can route. The vendor draws what it is told; the integrator decides what to tell it.

Expect to assign a small pin list to balls on a whiteboard: supplies first, fast signals escapable, quiet pins protected. The second lesson is that exercise with the NanoSoC list.

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See also

  • I/O Ring and Pad Types
  • Pad Count and Simultaneous Switching
  • Power Delivery Through Package and Bumps