Cell vs Net Delay Budgets: Inputs & Outputs

Inputs and outputs contract

Inputs & Outputs for Cell vs Net Delay Budgets focuses on cell delay %, net delay %, high fanout net count, transition violations. The goal is to connect the observable symptom to timing mechanism, ownership, and regression risk.

Treat these as a signed interface contract. Ambiguity here is the single biggest source of wasted integration weeks, because two teams debug against different assumptions.

INPUTS
  - SDC (clocks, IO delays, exceptions)
  - Liberty libraries per corner
  - SPEF/parasitics and RC corner
  - MMMC scenario definition

OUTPUTS
  - WNS/TNS reports per scenario
  - path group summaries
  - constraint audit / waiver log
  - signoff closure memo

Timing path sequence

TIMING PATH — Cell vs Net Delay Budgets

launch FF --logic stages--> capture FF
     |                           |
  launch clock                capture clock
     |                           |
  required: arrival < capture_edge - setup
  metric: cell delay %, net delay %, high fanout net count, transition violations

Ownership map

OWNERSHIP MAP — Cell vs Net Delay Budgets

artifact              owner
----------------      -----------------
timing report       PD owner
SDC/constraint      STA owner
implementation      extraction owner

Every WNS cluster needs a named owner before ECO.

STA deep dive

Slack is a path story — read the graph, not just the number.

Concept diagram

TIMING GRAPH

FF --cell-- logic --net-- logic --cell-- FF
launch                              capture

Metric graph

SLACK TAIL

paths |    ***
      |  *******
      |*********  <- fix WNS first

Reports and artifacts

• WNS/TNS

• path slack histogram

• cell vs net %

• path group summary

Mini case study

WNS -90ps but 80% net delay on one congested route — PD route fix beat upsizing three cells.

Debug branches

• Cell-heavy -> sizing/VT

• Net-heavy -> route/layer

• Check launch/capture clocks

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

• State corner, mode, view, and database tag with every slack claim.

• Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

• Comparing STA runs with different SPEF or SDC tags.

• Broad false_path to green-wash violations.

• Setup-only ECO without hold check.

Principal STA review addendum

Path delay splits between library cell arcs and interconnect parasitics; implementation fixes target the dominant contributor.

Metric: cell delay %, net delay %, high fanout net count, transition violations