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Report Timing Deep Read

Delay Graph & Path Analysis: Senior STA debug reads incremental delay, sense, edge, clock domain, and exception flags on the critical path — not just slack number.

What this topic teaches

Report Timing Deep Read is about converting constraints and path rules into measurable slack. Senior STA debug reads incremental delay, sense, edge, clock domain, and exception flags on the critical path — not just slack number. The hard part is never the textbook inequality; it is proving, under the right corner/mode/view, which layer — constraint, view, or implementation — broke the contract.

The senior-engineer question

When incremental delay attribution accuracy, false debug rate moves, can you identify the failing path group, the STA layer, the responsible owner, and the smallest experiment that proves the root cause?

diagram
STA CLOSURE FLOW — Report Timing Deep Read

constraints (SDC)
        |
        v
timing graph (cell + net delays)
        |
        v
MMMC scenarios (corner x mode x view)
        |
        v
variation + SI adjustments
        |
        v
slack (WNS/TNS) -> ECO -> regression

Debug rule: always state corner, mode, view, and database tag with slack.

Picture the timing closure flow

Start every study session by drawing the behavior before reading signals. The diagrams below are the mental models to reproduce on a whiteboard.

Critical path annotation

diagram
REPORT TIMING LINE (what to read)

 (rise) 0.12  U234/Z (AND2)     <- incremental delay
        0.45  net foo/bar       <- net delay + fanout
 (fall) 0.08  U567/D (DFF)      <- sense and edge matter
 clock: clk_main rise@500ps      <- launch/capture clocks

Read incremental delay, not just total slack.

Timing path sequence

diagram
TIMING PATH — Report Timing Deep Read

launch FF --logic stages--> capture FF
     |                           |
  launch clock                capture clock
     |                           |
  required: arrival < capture_edge - setup
  metric: incremental delay attribution accuracy, false debug rate

Who owns which layer

diagram
STA OWNERSHIP LAYERS — Report Timing Deep Read

layer              owns                         failure mode
----------------   --------------------------   ---------------------
constraints        clocks, IO, exceptions       false violations
implementation     cells, nets, placement       real path delay
extraction         SPEF/RC corners              view mismatch
signoff policy     derate, MMMC matrix          margin disputes
closure           ECO order, regression        fix breaks other corner

Evidence to collect

  • Primary metric: incremental delay attribution accuracy, false debug rate.

  • Primary artifact: annotated timing report, path viewer screenshot, constraint trace.

  • Owners to bring into review: STA owner, timing closure lead.

  • Spec clause or requirement ID for every constraint claim.

  • One failing report_timing excerpt and one reduced path that isolates the rule.

Ownership map

diagram
OWNERSHIP MAP — Report Timing Deep Read

artifact              owner
----------------      -----------------
timing report       STA owner
SDC/constraint      timing closure lead

Every WNS cluster needs a named owner before ECO.

Subpages in this topic

Each topic is taught across mechanism, inputs/outputs, reports, debug, worked example, pitfalls, interview, checklist, theory, design space, expanded case study, walkthrough, comparison matrix, software view, and silicon PPA impact.

Key takeaways

  • State corner, mode, and view with every slack number.

  • Separate constraint bugs, view mismatches, and real path delays before ECO.

  • Run setup and hold plus full MMMC after every change.

Common pitfalls

  • Comparing runs with different SPEF or SDC tags.

  • Broad false_path to hide violations.

  • Setup-only ECO without hold regression.

STA deep dive

Slack is a path story — read the graph, not just the number.

Concept diagram

diagram
TIMING GRAPH

FF --cell-- logic --net-- logic --cell-- FF
launch                              capture

Metric graph

diagram
SLACK TAIL

paths |    ***
      |  *******
      |*********  <- fix WNS first

Reports and artifacts

  • WNS/TNS

  • path slack histogram

  • cell vs net %

  • path group summary

Mini case study

WNS -90ps but 80% net delay on one congested route — PD route fix beat upsizing three cells.

Debug branches

  • Cell-heavy -> sizing/VT

  • Net-heavy -> route/layer

  • Check launch/capture clocks

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

  • State corner, mode, view, and database tag with every slack claim.

  • Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

  • Comparing STA runs with different SPEF or SDC tags.

  • Broad false_path to green-wash violations.

  • Setup-only ECO without hold check.