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Course contents

  • Logic Synthesis Glossary
  • Logic Synthesis Cheatsheet
  • Synthesis Foundations14
  • Logic Optimisation and Mapping20
    • Boolean Optimisation
      • Constant Propagation
      • Redundancy Removal
      • Factoring, Collapsing and Sharing
      • AIGs, Depth and Area
      • Don't-Cares
    • Technology Mapping
    • Cell Libraries and Liberty
    • Structuring and Buffering
  • Constraints and Timing15
  • Sequential, FSM and Memory19
  • Datapath Synthesis14
  • Area, Power and Test14
  • Verification, ECO and Handoff15
  • Flows and Debugging15
  • Interview and Judgment11
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‹Logic Optimisation and Mapping
  1. Topics
  2. Logic Synthesis
  3. Logic Optimisation and Mapping
  4. Boolean Optimisation

Part 2 · Logic Optimisation and Mapping · Intermediate

Boolean Optimisation

Constant propagation, redundancy removal, sharing, and the depth-area trade-off.

  • 5topics
  • 5lessons

Boolean optimisation rewrites a logic network into a cheaper equivalent. Constant propagation, redundancy removal, sharing, factoring and don't-cares each shrink the network while keeping its function.

Rewrite

What it removes

Risk

Constant propagation

Gates with a tied input and everything they imply

None: the function is unchanged on every input.

Redundancy removal

Duplicate gates and dead logic

None: the function is unchanged on every input.

Sharing and factoring

Repeated sub-expressions and excess literals

Depth can grow while area shrinks.

Don't-care simplification

Minterms the environment never produces or never observes

Wrong care-set claims change the function.

Order of Boolean optimisation steps.
Optimisation order: fold constants, drop redundancy, share and factor, then balance depth against area with don't-cares last.

Lesson

What it covers

Constant propagation

Folding tied inputs through gates and across hierarchy.

Redundancy removal

Duplicate, dead and self-cancelling logic with a Yosys proof.

Factoring, collapsing and sharing

Literal counts and sub-expression reuse with a Python equivalence check.

AIGs, depth and area

And-Inverter Graphs and the depth-area trade-off.

Don't-cares

Satisfiability and observability don't-cares in minimisation.

Check yourself A rewrite drops three gates but adds one level of depth. Which table row warns about that exchange, and what must still hold?

The sharing and factoring row. The function must stay identical on every input combination.

Interview

Carry one sentence per lesson: constants fold forward, redundancy removal deletes provably useless gates, factoring trades literals against depth, AIGs expose depth and sharing, and don't-cares only help when the care set is right.

Related topics

  • Up: Logic Optimisation and Mapping

  • Next: Technology Mapping

PreviousNext: Constant Propagation

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See also

  • Technology Mapping
  • Cell Libraries and Liberty
  • Structuring and Buffering