Skip to content
DenseChip
Learn
PracticeCode labInterview

DenseChip

Navigate

Menu

LearnPracticeCode labInterview

Tools

All toolsSV editorCode repoResume
DenseChip

Practice, courses, and chip-design tools in one focused workspace.

LearnPracticeCode labInterviewToolsLearning paths

© 2026 DenseChip

AboutContactPrivacyTerms
Skip to lesson

Course contents

  • Logic Synthesis Glossary
  • Logic Synthesis Cheatsheet
  • Synthesis Foundations14
  • Logic Optimisation and Mapping20
    • Boolean Optimisation
      • Constant Propagation
      • Redundancy Removal
      • Factoring, Collapsing and Sharing
      • AIGs, Depth and Area
      • Don't-Cares
    • Technology Mapping
    • Cell Libraries and Liberty
    • Structuring and Buffering
  • Constraints and Timing15
  • Sequential, FSM and Memory19
  • Datapath Synthesis14
  • Area, Power and Test14
  • Verification, ECO and Handoff15
  • Flows and Debugging15
  • Interview and Judgment11
Loading lesson

‹Boolean Optimisation
  1. Topics
  2. Logic Synthesis
  3. Logic Optimisation and Mapping
  4. Boolean Optimisation
  5. Factoring, Collapsing and Sharing

Part 2 · Logic Optimisation and Mapping · Intermediate

Factoring, Collapsing and Sharing

Literal counts, sub-expression reuse, and a runnable equivalence check.

On this page

    Factoring and collapsing

    Factoring pulls a common literal out of several product terms. Collapsing does the reverse: it substitutes one expression into another to expose new simplifications.

    The running example is the 3-input majority function. Its sum of products uses 6 literals; the factored form below uses 5.

    Form

    Expression

    Literals

    Sum of products

    ab + ac + bc

    6

    Factored

    a(b + c) + bc

    5

    Collapsed then refactored

    Same factored form here

    5

    Sharing

    Sharing implements one repeated sub-expression once and reuses its output. The inputs b and c are shared here: each drives two gates, the OR that forms b + c and the AND that forms bc.

    Areas are library units of the fictional teaching library course.lib: AND2 and OR2 cost 3 units each. The calc block prices both forms.

    Diagram
    original ab + ac + bc: 3 AND2 + 2 OR2 (3-input OR from two OR2)
    area = 3 x 3 + 2 x 3 = 9 + 6 = 15 area units
    factored a(b + c) + bc: 2 AND2 + 2 OR2
    area = 2 x 3 + 2 x 3 = 6 + 6 = 12 area units
    saving = 15 - 12 = 3 area units = 3 / 15 = 20%

    Proof in Python

    The program below checks all 8 input rows for equality. It also counts literals from the expression trees and requires the factored form to be smaller.

    example.py
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32
    33
    34
    35
    36
    37
    38
    39
    40
    41
    42
    43
    44
    45
    import sys
    
    def f_orig(a, b, c):
        return (a and b) or (a and c) or (b and c)
    
    def f_fact(a, b, c):
        return (a and (b or c)) or (b and c)
    
    def count_lits(node):
        if isinstance(node, str):
            return 1
        return sum(count_lits(k) for k in node[1:])
    
    ORIG = ("or", ("and", "a", "b"), ("and", "a", "c"), ("and", "b", "c"))
    FACT = ("or", ("and", "a", ("or", "b", "c")), ("and", "b", "c"))
    
    rows = 0
    diff = 0
    for a in (0, 1):
        for b in (0, 1):
            for c in (0, 1):
                rows += 1
                if bool(f_orig(a, b, c)) != bool(f_fact(a, b, c)):
                    diff += 1
    
    no = count_lits(ORIG)
    nf = count_lits(FACT)
    
    if rows != 8:
        print("FAIL: walked " + str(rows) + " rows, want 8")
        sys.exit(1)
    if diff != 0:
        print("FAIL: " + str(diff) + " rows differ")
        sys.exit(1)
    if no != 6:
        print("FAIL: original counts " + str(no) + " literals, want 6")
        sys.exit(1)
    if nf != 5:
        print("FAIL: factored counts " + str(nf) + " literals, want 5")
        sys.exit(1)
    if not nf < no:
        print("FAIL: factored form is not smaller")
        sys.exit(1)
    
    print("PASS: factored form agrees on 8 of 8 rows with 5 literals against 6")

    Common mistakes

    Fewer literals need not mean less area or delay. Factoring can add levels, and collapsing can duplicate terms before anything improves.

    Common pitfall

    Collapsing everything flat and hoping the tool recovers is slow and often worse. Collapse locally where sharing is visible, then let mapping decide.

    Interview

    Likely probes: literal arithmetic and the equivalence argument.

    • Majority goes from 6 literals to 5, and from 15 area units to 12.

    • Equivalence here is exhaustive: all 8 rows agree.

    • Sharing saves the repeated term once per extra user, minus the wiring cost.

    Check yourself The factored form uses one fewer AND gate. What is shared, and which two gates does it feed?

    The inputs b and c are shared. Each drives the OR forming b + c and the AND forming bc.

    Check yourself All 8 rows agree. What does that prove about the two forms?

    They compute the same 3-input function. Every input combination gives the same output.

    Related topics

    • Previous: Redundancy removal

    • Next: AIGs, depth and area

    Previous

    19 / 139

    Next: AIGs, Depth and Area

    Up next

    Up nextAIGs, Depth and Area

    Sign in to save progress

    Practice this lessonReport an error

    See also

    • Constant Propagation
    • Don't-Cares