Part 8 · Checking & Coverage · Intermediate

Cross Coverage & Plan Traceability

Cross coverpoints, binsof filtering, FSM transitions, and mapping bins to plan feature IDs.

Why crosses matter

Individual coverpoints catch single-field scenarios. Cross coverpoints catch combinations — the interaction bugs. A write of length 4 may work fine, and a read may work fine, but a write-then-read of length 4 with an error response may not. Crosses exercise those combinations.

systemverilog

// Full cross — all combinations
x_dir_len: cross cp_dir, cp_len;
// Hits: read+single, read+small, read+large, write+single, write+small, write+large

// Selective cross with binsof — only combinations in the plan
x_wr_len: cross cp_dir, cp_len {
  bins wr_4 = binsof(cp_dir.write) && binsof(cp_len.small);
  ignore_bins rd = binsof(cp_dir.read);  // reads not in plan for this cross
}

// FSM transition coverpoint (not a cross — sequence coverage)
cp_fsm: coverpoint tr.state {
  bins idle_to_setup = (IDLE => SETUP);
  bins setup_to_acc  = (SETUP => ACCESS);
  bins acc_to_idle   = (ACCESS => IDLE);
}

Plan traceability example

Every bin and cross should trace to a verification-plan feature ID. This enables automated sign-off: merged coverage report row F-042 maps directly to plan section 4.2.

diagram

PLAN TRACEABILITY MAP [COVER]

  Verification Plan          Covergroup Element              Bin Name
  ─────────────────────────────────────────────────────────────────────
  F-040 Bus read ops    ──►  cp_dir                        read
  F-041 Bus write ops   ──►  cp_dir                        write
  F-042 Write len 2-4   ──►  x_wr_len cross                wr_4
  F-043 Burst len >4    ──►  cp_len                        large
  F-050 FSM idle→setup  ──►  cp_fsm                        idle_to_setup
  F-051 FSM setup→acc   ──►  cp_fsm                        setup_to_acc
  F-055 Error response  ──►  cp_resp                       error
  F-060 Full FSM loop   ──►  cp_fsm                        acc_to_idle

  Sign-off rule: every plan row has ≥1 bin with hit count > 0 after merge

Traceability in covergroup comments

systemverilog

covergroup cg with function sample(bus_txn t);
  // F-040, F-041
  cp_dir : coverpoint t.write {
    bins read  = {0};   // F-040
    bins write = {1};   // F-041
  }
  // F-042
  x_wr_len : cross cp_dir, cp_len {
    bins wr_4 = binsof(cp_dir.write) && binsof(cp_len.small);  // F-042
    ignore_bins rd = binsof(cp_dir.read);
  }
  // F-050, F-051, F-060
  cp_fsm : coverpoint t.state {
    bins idle_to_setup = (IDLE => SETUP);  // F-050
    bins setup_to_acc  = (SETUP => ACCESS); // F-051
    bins acc_to_idle   = (ACCESS => IDLE);  // F-060
  }
endgroup

Key takeaways

Crosses catch combination bugs — prioritize per plan, not exhaustive.
Use binsof to filter crosses to plan-relevant combinations only.
Comment plan feature IDs in covergroup — enables audit and sign-off automation.

Common pitfalls

Only single coverpoints — miss interaction bugs between fields.
Full cross on 5+ coverpoints — bin explosion, uncloseable.
Plan rows with no corresponding bin — feature never measured.

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