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Course contents

  • Start Here4
  • UVM Foundations14
  • UVM Phases & Simulation Lifecycle26
  • Factory & Configuration15
  • Transaction-Level Modeling (TLM)13
  • UVM Sequences & Stimulus21
  • UVM Agents & Protocol VIP21
  • Environment & Test Classes11
  • Checking & Coverage in UVM21
  • UVM Register Abstraction Layer (RAL)22
  • Advanced UVM in Practice13
  • Debug & Regression10
  • Coding Practice47
    • How to Use This Course
    • Whiteboard Delivery Framework
    • Scoreboard Coding
    • Monitor & Driver Coding
    • Sequences Coding
    • TLM & Analysis
      • Analysis Port Fanout
      • Blocking TLM FIFO
      • Subscriber Compare Hook
      • TLM Tricky Q&A
    • RAL & Adapters
    • Factory & config_db
    • Phases & Objections
    • Env & Test Architecture
    • Debug Broken Testbench
    • Mock Interview Sets
    • Senior UVM Coding Cheat Sheet
  • Verification in Industry Practice10
  • Senior Prep: Architecture, Leadership and Interviews32
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←TLM & Analysis
  1. Topics
  2. UVM Verification
  3. Coding Practice
  4. TLM & Analysis
  5. Analysis Port Fanout
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    UVM Coding PracticeSenior

    Analysis Port Fanout

    One monitor port to scoreboard and coverage.

    Interview prompt

    Connect monitor analysis port to scoreboard and subscriber — draw diagram.

    Diagram
    WHITEBOARD CHAIN
    
    1. DECLARE    interfaces / types / ports you need
    2. SKELETON   class extends + utils macro + key methods
    3. MECHANISM  fill one critical method while narrating
    4. PITFALL    name one bug juniors make on this pattern
    5. TEST       how you would smoke-test the component

    Reference sketch (≤40 lines)

    design.sv
    1
    2
    3
    4
    5
    // env connect_phase
    agent.mon.ap.connect(sb.act_imp);
    agent.mon.ap.connect(cov_sub.analysis_export);
    // monitor side
    uvm_analysis_port #(txn) ap;

    Mechanism to narrate

    • Monitor calls ap.write(txn) once per completed beat

    • Each subscriber write() runs in same simulation thread

    • Order: scoreboard then coverage — document if order matters

    Code lab drill

    After reading, try Code lab exercise uvm-l8-int-tlm-fanout — topic reference: /topics/uvm/coding-practice/tlm-analysis/analysis-port-fanout

    Smoke test (5 minutes)

    • One bus beat → UVM_INFO from scoreboard and subscriber.

    • print_topology shows two connects from mon.ap.

    Common pitfalls

    • Forgot export on subscriber.

    • Dangling unconnected imp.

    • Connecting port to port directly.

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    See also

    • Subscriber Compare Hook
    • TLM Tricky Q&A