UVM Coding Practice · Senior
Blocking TLM FIFO
uvm_tlm_fifo between producer and consumer.
Interview prompt
When use uvm_tlm_fifo instead of direct analysis connect?
diagram
WHITEBOARD CHAIN
1. DECLARE interfaces / types / ports you need
2. SKELETON class extends + utils macro + key methods
3. MECHANISM fill one critical method while narrating
4. PITFALL name one bug juniors make on this pattern
5. TEST how you would smoke-test the componentReference sketch (≤40 lines)
systemverilog
uvm_tlm_fifo #(txn) fifo;
// producer task
fifo.put(t);
// consumer task
fifo.get(got);Use a FIFO when producer and consumer run in different tasks/phases and rates differ — predictor bursts while scoreboard compares slowly. Analysis push is fire-and-forget; FIFO adds blocking backpressure.
Mechanism to narrate
blocking put waits if fifo full (bounded depth)
blocking get waits if fifo empty
Decouples threads without losing transactions
Smoke test (5 minutes)
Producer faster than consumer — consumer still receives all items.
Set depth=1 — producer stalls until consumer gets.
Common pitfalls
Unbounded fifo on stress — memory growth.
Using fifo for broadcast — use analysis fanout instead.