The register layer is built: the DMA's registers have a model, an adapter, an explicit predictor and a backdoor, and a whole job runs by register name. That is where most courses stop, and where the interview questions start. Does the reset test really check every register? What does register coverage measure? How do you model a memory, a register on two buses, a double-buffered register, an interrupt status that the hardware sets behind the model's back? And what changes when the block model is one of forty inside a chip?
Run the built-in register sequences, read their logs critically, and steer them with the NO_* attributes.
Turn on generated register coverage with the three switches it needs, and add the register coverage that actually tracks behaviour.
Model memories, registers reachable from two buses, shadow and alias registers, and interrupt status, and keep the mirror honest for each.
Compose block models into a chip model, relocate them, reuse block sequences unchanged, and keep a huge model fast.
Answer the senior RAL questions with mechanisms and evidence instead of definitions.
Every lesson uses the course bench's register layer (dma_ral_tb.sv) and its real logs. Where the DMA has nothing to show (it has no memory and one bus), a small two-port SRAM slave was built and run as a scratch test, and its logs are labelled that way.
# | Lesson | The question it answers |
|---|---|---|
1 | What do the library's register tests really check, and how do you leave registers out? | |
2 | Why is generated register coverage often 0%, and which register coverage matters? | |
3 | How does uvm_mem differ from a register, and why did a burst write turn into reads? | |
4 | How does one register live on two buses without the mirror going stale? | |
5 | How do you model storage that one address does not map to one-to-one? | |
6 | How does an interrupt handler read and clear status through the model safely? | |
7 | How do block models compose, relocate and stay fast in a chip? | |
8 | What do senior interviewers ask about RAL, and what does a strong answer sound like? |