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Course contents

  • Architecture Metrics Reference
  • Workload Taxonomy for Architects
  • Architecture Glossary
  • Computer Architecture Cheatsheet
  • Pipeline Fundamentals14
  • Memory Hierarchy15
  • NoC and Interconnect Architecture6
    • On-Chip Networks
      • Topology Families Compared
      • NoC Latency and Bandwidth Math
      • XY Routing and Deadlock Freedom
      • Credit Flow Control and Buffers
      • Arbitration Policies and QoS
      • NoC Triage Playbook
  • Coherency and Memory Ordering9
  • Performance Analysis9
  • Accelerator Architectures6
  • SoC Architecture Tradeoffs9
  • Architecture Interview Prep14
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‹On-Chip Networks
  1. Topics
  2. Computer Architecture
  3. NoC and Interconnect Architecture
  4. On-Chip Networks
  5. NoC Latency and Bandwidth Math

Computer Architecture · All levels

NoC Latency and Bandwidth Math

Zero-load latency, bisection-limited throughput and Little's-law buffer sizing.

On this page

    Four terms of zero-load latency

    Zero-load latency has four terms: injection, serialization, router pipeline over H hops, and link traversal over H hops. Queueing adds a fifth term under load.

    Serialization is packet flits divided by flits per cycle. A 5-flit packet on a 1-flit-per-cycle link costs 5 cycles before pipelining helps the next packet.

    Diagram
    Packet 5 flits, link 1 flit per cycle, path H = 6 hops, router 3 cycles, link 1 cycle per hop
    serialization   = 5 flits / 1 flit per cycle = 5 cycles
    router pipeline = 6 hops * 3 cycles = 18 cycles
    link traversal  = 6 hops * 1 cycle = 6 cycles
    zero-load latency = 5 + 18 + 6 = 29 cycles

    Bisection caps throughput

    Bisection bandwidth bounds cross-partition traffic before any link saturates. Offered load above the cap queues; it never gets through.

    Diagram
    8-link bisection, 4 bytes per cycle per link, 1 GHz clock
    bisection throughput = 8 * 4 B * 1e9 = 32 GB/s per direction
    offered 40 GB/s across the cut -> achieved at most 32 GB/s; the extra 8 GB/s queues

    Tail latency is the KPI that exposes the cap. Averages stay flat while the queue builds; p99 climbs first, which is why the triage lesson watches p99 and not the mean.

    Little's law sizes every queue

    occupancy=arrival rate×residence time

    Little's law turns a round-trip time into a buffer depth. A credit pool must cover bandwidth times round-trip delay or the link idles waiting for returns.

    Diagram
    Little's law: occupancy = arrival rate * residence time
    link 1 flit per cycle, credit round trip 6 cycles -> depth at least 1*6 = 6 flits
    link 1 flit per cycle, credit round trip 12 cycles -> depth at least 12 flits

    Depth below the product throttles throughput to depth over round-trip. The credit lesson proves this with a running link: depth 2 against a 6-cycle round trip delivers 20 flits in 60 cycles.

    Common mistakes

    Common pitfall

    Adding buffer depth to hide congestion backfires. Deeper queues absorb bursts, then drain slowly, so tail latency and recovery time grow while the root cause stays hidden.

    Interview

    Likely probes: derive the four terms, and size a pool from a round trip.

    • Serialization follows from flits and link width; router and link terms scale with hops; queueing is load-dependent.

    • Credit depth of at least bandwidth times round trip keeps a healthy link busy; less depth is a throughput cap, not a tuning knob.

    Check yourself H doubles from 3 to 6 at fixed flit count. Which latency terms double and which stay flat?

    Router pipeline and link traversal double with H. Serialization and injection stay flat because they depend on packet size, not distance.

    Check yourself A queue holds 24 flits steady at 2 flits per cycle arrival. What residence time does Little's law report?

    12 cycles: 24 divided by 2. If the credit round trip is longer than 12 cycles, the pool is too shallow.

    Related topics

    • Credit flow control

    • Memory bandwidth and latency

    • Topology families

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    See also

    • Credit Flow Control and Buffers
    • Arbitration Policies and QoS
    • NoC Triage Playbook