A FIFO holds distributed state: a write pointer in one domain, a read pointer in another, and flags derived from both. Resetting only one side leaves the pointers disagreeing about occupancy forever, and the FIFO then overflows or underflows on data that is perfectly well behaved. Reset is consequently part of the CDC review, not somebody else's problem.
Reset each side with its own properly synchronised reset, so each domain releases cleanly on its own clock.
Assert both resets from the same source at the same time, so both pointers clear to zero together.
Hold reset until each side has seen several clock edges, and long enough for the pointer synchronisers to flush stale values (at least the synchroniser depth in cycles of the slower clock after the pointers reach zero).
Forbid writes while the write reset is asserted and reads while the read reset is asserted.
After reset the FIFO reads empty and not full; confirm both flags, not just one.
The synchroniser flops themselves take the reset of their own receiving domain, matching the domain they clock with. A synchroniser whose flops reset with the far domain releases at the wrong time and can present a half-reset pointer to live logic. Where the simulation model of the synchroniser has no reset, the testbench holds both domain resets long enough to flush unknowns before traffic starts.
In generic terms, the memory array is the one part of the FIFO that does not cross through synchronisers: write addresses and write data stay in the write domain, read addresses and read data stay in the read domain, and the array itself is a dual-clock structure. Structural checks therefore expect the array to be recognised as a memory rather than as a bundle of crossings, with the two clock associations documented; anything else (a single-clocked array, or data paths leaking between domains around the array) is reported for review. Reset-domain analysis covers the FIFO too, since its resets span two domains.
No: the write pointer still holds its old value, so occupancy is garbage and full/empty are meaningless. Reset both sides together before any traffic.