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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
    • Covergroup and Coverpoint Puzzles
    • Cross Coverage Puzzles
    • Coverage Options Puzzles
    • Coverage Closure and Sampling Timing Puzzles
      • Sampling region off-by-one on state bins
      • Unreachable bin from stimulus constraints
      • Manual sample called at wrong phase
      • get_coverage vs get_inst_coverage interpretation
      • Unreachable cross tuple from protocol rules
      • at_least threshold causes closure plateau
    • Functional Coverage Puzzles: Tricky Q&A
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Coverage Closure and Sampling Timing Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. Functional Coverage Puzzles
  4. Coverage Closure and Sampling Timing Puzzles
  5. Unreachable cross tuple from protocol rules

VLSI DV Interview Puzzles · All levels

Unreachable cross tuple from protocol rules

Cross closure is stuck at 75% despite long regressions. Explain mathematically and propose model correction.

On this page

    Puzzle

    Difficulty: Hard · Puzzle 5 of 6 · Topic: Coverage Closure and Sampling Timing Puzzles

    Cross closure is stuck at 75% despite long regressions. Explain mathematically and propose model correction.

    Code

    design.sv
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    covergroup cg with function sample(bit opcode, bit resp);
      cp_opcode: coverpoint opcode {
        bins rd = {0};
        bins wr = {1};
      }
      cp_resp: coverpoint resp {
        bins ok    = {0};
        bins slverr = {1};
      }
      x: cross cp_opcode, cp_resp;
    endgroup
    
    // Protocol guarantee: rd always returns ok, never slverr

    Hint

    Auto cross has 4 tuples, but one is forbidden by protocol semantics.

    Step-by-step solution

    Diagram
    1) Cross denominator is 2*2 = 4 tuples.
    2) Tuple (rd,slverr) is unreachable by protocol.
    3) Maximum realizable hits are 3 tuples -> closure ceiling 3/4 = 75%.
    4) Corrective action is to ignore/illegalize unreachable tuple with rationale tied to spec.

    Answer

    Answer: Stall at 75% is expected because rd+slverr cannot happen legally. Model must encode protocol reachability.

    Why candidates get it wrong

    Blindly trusting auto cross can create fake gaps and wasted closure effort.

    Interviewer follow-up

    Would you model rd+slverr as ignore_bins or illegal_bins, and what trade-off drives that choice?

    Related topics

    • Back to Coverage Closure and Sampling Timing Puzzles

    • Functional Coverage Puzzles section

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    See also

    • Sampling region off-by-one on state bins
    • Unreachable bin from stimulus constraints
    • Manual sample called at wrong phase