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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
    • Classic Brain Teasers
    • Probability Puzzles
    • Digital Logic Puzzles
      • Build XOR Using Only 2:1 MUXes
      • AND/OR/NOT from One 2:1 MUX Each
      • Minimum NAND Gates for XOR
      • Overlapping 1011 Sequence Detector
      • Mod-6 Counter Behavior Check
      • Metastability MTBF Improvement Estimate
    • Debugging Riddles
    • Logic & Aptitude Puzzles: Tricky Q&A
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Digital Logic Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. Logic & Aptitude Puzzles
  4. Digital Logic Puzzles
  5. Build XOR Using Only 2:1 MUXes

VLSI DV Interview Puzzles · All levels

Build XOR Using Only 2:1 MUXes

Construct Y = A ^ B using only 2:1 multiplexers and constants 0/1. Give one concrete implementation.

On this page

    Puzzle

    Difficulty: Medium · Puzzle 1 of 6 · Topic: Digital Logic Puzzles

    Construct Y = A ^ B using only 2:1 multiplexers and constants 0/1. Give one concrete implementation.

    Code

    mux_xor.sv
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    module mux_xor(input logic A, B, output logic Y);
      logic nB;
      // MUX form: Z = S ? D1 : D0
      assign nB = B ? 1'b0 : 1'b1;      // ~B
      assign Y  = A ? nB   : B;         // A?~B:B = A^B
    endmodule

    Hint

    Use one MUX to create ~B, then select between B and ~B using A.

    Step-by-step solution

    Diagram
    1) Recall 2:1 MUX equation: Z = S?D1:D0.
    2) Invert B by setting S=B, D1=0, D0=1 => nB = ~B.
    3) Build XOR with S=A, D1=nB, D0=B => Y = A?~B:B.
    4) Verify truth table: A=0 => Y=B; A=1 => Y=~B, which equals A^B.

    Answer

    Answer: Two MUXes suffice: one for ~B and one for A-select between B and ~B.

    Why candidates get it wrong

    Trying to do XOR in one MUX without a complemented input source.

    Interviewer follow-up

    Can you build XNOR with same structure and same MUX count?

    Related topics

    • Back to Digital Logic Puzzles

    • Logic & Aptitude Puzzles section

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    See also

    • Minimum NAND Gates for XOR
    • Overlapping 1011 Sequence Detector
    • Mod-6 Counter Behavior Check