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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
    • Testbench Debug Puzzles: Why Did the Test Hang?
    • Deadlock Scenario Puzzles: Objection and Phase Stalls
    • Scoreboard Puzzles: Mismatch or Ordering Bug?
    • Real Interview Rounds: End-to-End Debug Walkthrough
      • Round Walkthrough: Sequencer Waits for item_done
      • Round Walkthrough: Objection Deadlock with Clean Waves
      • Round Walkthrough: APB Reads Return Previous Data
      • Round Walkthrough: Out-of-Order Channel Mismatch
      • Round Walkthrough: Rare Parallel Deadlock
      • Round Walkthrough: End-of-Test False Fail
    • Scenario & Debug Puzzles: Tricky Q&A
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Real Interview Rounds: End-to-End Debug Walkthrough
  1. Topics
  2. DV Interview Puzzles
  3. Scenario & Debug Puzzles
  4. Real Interview Rounds: End-to-End Debug Walkthrough
  5. Round Walkthrough: Objection Deadlock with Clean Waves

VLSI DV Interview Puzzles · All levels

Round Walkthrough: Objection Deadlock with Clean Waves

Interviewer says waveform looks idle and clean, but simulation never exits. Use objection-centric reasoning and close with a robust patch.

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    Puzzle

    Difficulty: Hard · Puzzle 2 of 6 · Topic: Real Interview Rounds: End-to-End Debug Walkthrough

    Interviewer says waveform looks idle and clean, but simulation never exits. Use objection-centric reasoning and close with a robust patch.

    Code

    design.sv
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    task body();
      starting_phase.raise_objection(this);
      fork
        begin
          wait(cfg_done);
          run_traffic();
          starting_phase.drop_objection(this);
        end
        begin
          #1ms;
          if (!cfg_done) \`uvm_error("CFG", "timeout");
          disable fork; // bug: can kill drop path
        end
      join
    endtask

    Hint

    Mention \`+UVM_OBJECTION_TRACE\` as first high-yield evidence.

    Step-by-step solution

    Diagram
    1) Symptom: run_phase stall despite no visible signal toggling issues.
    2) Hypotheses: leaked objection, non-terminating thread, or blocked mailbox/semaphore.
    3) Instrumentation: turn on \`+UVM_OBJECTION_TRACE\` and per-thread lifecycle logs.
    4) Root cause: timeout branch disable fork kills thread that was supposed to drop objection.
    5) Fix + validation: move drop_objection to guaranteed cleanup block and rerun timeout scenario.

    Answer

    Answer: Actual bug: disable fork can terminate the only drop_objection path. Fix: guarantee objection drop independently of fork race outcomes.

    Why candidates get it wrong

    Idle waveform does not imply no active objections.

    Interviewer follow-up

    How would you redesign timeout handling so it cannot bypass critical cleanup?

    Related topics

    • Back to Real Interview Rounds: End-to-End Debug Walkthrough

    • Scenario & Debug Puzzles section

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    See also

    • Round Walkthrough: Out-of-Order Channel Mismatch
    • Round Walkthrough: Rare Parallel Deadlock
    • Round Walkthrough: End-of-Test False Fail