VLSI DV Interview Puzzles · All levels

Round Walkthrough: Out-of-Order Channel Mismatch

Interviewer provides logs with mismatch bursts under high concurrency only. Demonstrate a complete round that proves checker-model issue, not DUT corruption.

Puzzle

Difficulty: Medium · Puzzle 4 of 6 · Topic: Real Interview Rounds: End-to-End Debug Walkthrough

Interviewer provides logs with mismatch bursts under high concurrency only. Demonstrate a complete round that proves checker-model issue, not DUT corruption.

Code

systemverilog

exp_fifo.get(exp);
got_fifo.get(got);
if (!exp.compare(got))
  \`uvm_error("SB", "mismatch");
// protocol note: responses may return out of order by tag

Hint

Show how you ask for protocol guarantees before editing scoreboard logic.

Step-by-step solution

diagram

1) Symptom: mismatch frequency rises with parallel outstanding transactions.
2) Hypotheses: data corruption, monitor reorder, or scoreboard ordering assumption bug.
3) Instrumentation: log compare pairs with tag/id and outstanding depth.
4) Root cause: strict FIFO compare conflicts with legal out-of-order response behavior.
5) Fix + validation: match by tag/id map and pass directed reorder stress tests.

Answer

Answer: Actual bug: scoreboard uses in-order compare for an out-of-order protocol. Fix: key matches by transaction tag and keep timeout for unmatched entries.

Why candidates get it wrong

If you skip protocol clarification, you may 'fix' the DUT for a checker mistake.

Interviewer follow-up

What data structure would you use for high-throughput keyed matching and why?

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