Puzzle

Difficulty: Medium · Puzzle 3 of 6 · Topic: Real Interview Rounds: End-to-End Debug Walkthrough

Interview trace: every APB read returns previous address data. You must separate protocol violation from monitor bug in five clear steps.

Code

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always @(posedge pclk) begin
  if (start_read) begin
    psel   <= 1'b1;
    penable<= 1'b1;
    paddr  <= req.addr; // updated too late
  end
end

Hint

APB setup and enable phases must be distinct and ordered.

Step-by-step solution

1) Symptom: read data lags by one transfer under back-to-back traffic.
2) Hypotheses: APB phase timing violation, monitor sampling skew, or DUT pipeline bug.
3) Instrumentation: annotate setup/access phase wave markers and compare against APB spec.
4) Root cause: paddr and penable are asserted in same cycle, violating setup-before-enable timing.
5) Fix + validation: drive paddr/psel in setup cycle, penable in next cycle; rerun directed read sequence.

Answer

Answer: Actual bug: APB driver violates setup/access sequencing, so DUT samples stale address. Fix: split drive into correct two-phase APB timing.

Why candidates get it wrong

Many candidates inspect scoreboard first; this is stimulus protocol timing.

Interviewer follow-up

Which assertion would you write to enforce APB setup/access sequencing in future regressions?

Related topics

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