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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
    • Testbench Debug Puzzles: Why Did the Test Hang?
      • Handshake Hang: Missing item_done on One Branch
      • Missing run_phase Objection in Test
      • Wrong Phase: Starting Traffic in shutdown_phase
      • Handshake Violation: item_done Called Twice
      • Sequence get_response Stall
      • Virtual Sequence Waits on Event Never Triggered
    • Deadlock Scenario Puzzles: Objection and Phase Stalls
    • Scoreboard Puzzles: Mismatch or Ordering Bug?
    • Real Interview Rounds: End-to-End Debug Walkthrough
    • Scenario & Debug Puzzles: Tricky Q&A
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Testbench Debug Puzzles: Why Did the Test Hang?
  1. Topics
  2. DV Interview Puzzles
  3. Scenario & Debug Puzzles
  4. Testbench Debug Puzzles: Why Did the Test Hang?
  5. Wrong Phase: Starting Traffic in shutdown_phase

VLSI DV Interview Puzzles · All levels

Wrong Phase: Starting Traffic in shutdown_phase

Interview log: 'late_shutdown_seq waiting for grant' forever. The same sequence works in run_phase. Why does this version stall?

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    Puzzle

    Difficulty: Medium · Puzzle 3 of 6 · Topic: Testbench Debug Puzzles: Why Did the Test Hang?

    Interview log: 'late_shutdown_seq waiting for grant' forever. The same sequence works in run_phase. Why does this version stall?

    Code

    design.sv
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    class late_test extends uvm_test;
      \`uvm_component_utils(late_test)
      virtual task shutdown_phase(uvm_phase phase);
        late_shutdown_seq seq;
        phase.raise_objection(this);
        seq = late_shutdown_seq::type_id::create("seq");
        seq.start(env.agent.seqr); // hangs
        phase.drop_objection(this);
      endtask
    endclass

    Hint

    Check which components are still actively driving sequence items in this phase.

    Step-by-step solution

    Diagram
    1) Print phase callbacks for sequencer and driver to see active phases per component.
    2) Verify driver traffic loop is implemented in run/main and has already quiesced by shutdown.
    3) Observe sequence waiting for grant because no consumer side is alive.
    4) Move traffic sequence to run/main phase or keep driver active in matching phase domain.
    5) Add a phase-compatibility check before starting traffic sequences.

    Answer

    Answer: Bug: sequence is launched in shutdown_phase after driver traffic loop has ended. Fix: start it in the same active phase domain as the driver (typically run/main).

    Why candidates get it wrong

    People chase arbitration settings, but this is phase alignment, not priority.

    Interviewer follow-up

    What diagnostics would you add to fail fast if a sequence starts in an incompatible phase?

    Related topics

    • Back to Testbench Debug Puzzles: Why Did the Test Hang?

    • Scenario & Debug Puzzles section

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    See also

    • Handshake Hang: Missing item_done on One Branch
    • Sequence get_response Stall
    • Virtual Sequence Waits on Event Never Triggered