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Course contents

  • RTL Foundations36
  • Combinational Design25
  • Sequential Design27
  • FSM & Control27
  • Timing & Clocking39
  • Reset & CDC34
    • Reset Architecture
    • Metastability and Synchronisation
    • Asynchronous FIFO
    • CDC Protocols
    • Reset Domain Crossing
      • RDC Is CDC Plus Reset Asymmetry
      • Reset Isolation Pattern
      • Quiescent State Before Reset Release
      • RDC Signoff Checklist
      • Recovery, Removal and Verification Focus
    • CDC Verification
  • Memory & Buses57
  • Advanced RTL28
  • Senior & Interview76
  • Glossary and Notation
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