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Course contents

  • How to Use This Course
  • Reading Path
  • STA Glossary
  • STA Metrics Reference
  • STA Mastery Cheatsheet
  • Timing Paths and Checks16
  • Constraints & SDC Fundamentals20
  • Delay Graph & Path Analysis16
  • Beyond Setup and Hold16
    • Latches and Time Borrowing
    • Clock Gating Checks
    • Recovery, Removal and Async
      • Recovery and Removal Model
      • Reset Tree Timing
      • Assertion Versus Release
      • Recovery and Removal Signoff
    • Pulse Width and Min Period
  • Multi-Corner Multi-Mode Signoff16
  • OCV, AOCV, POCV and Variation16
  • Crosstalk and Noise16
  • ECO and Closure16
  • STA Debug Playbook16
  • STA Interview Prep26
  • Capstone Timing Signoff Lab4
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‹Recovery, Removal and Async
  1. Topics
  2. Static Timing Analysis
  3. Beyond Setup and Hold
  4. Recovery, Removal and Async
  5. Reset Tree Timing

Part 4 · Beyond Setup and Hold · All levels

Reset Tree Timing

A reset net fans out to thousands of flops through a buffer tree; the spread of arrival times across it can split the release over two clock cycles.

On this page

    Why it matters

    The reset reaches every flop through a tree of buffers, and the arrival times differ. If the spread is small compared with the recovery slack of the latest flop and the removal slack of the earliest, every flop takes the same first clock edge after the release. A small spread that straddles an edge minus the recovery time still splits the release: some flops leave reset one cycle before others, and the design starts in an inconsistent state.

    A partial release

    example.py
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    import math
    rec = 0.20
    arrivals = [2.25, 2.60, 2.95, 3.20, 3.55]      # release arrival at five flops (ns after the launch edge)
    def first_edges(T):
        return sorted({math.ceil((a + rec) / T) * T for a in arrivals})
    safe = first_edges(10.0)
    tight = first_edges(3.0)
    assert safe == [10.0]
    assert tight == [3.0, 6.0]
    spread = max(arrivals) - min(arrivals)
    assert abs(spread - 1.30) < 1e-9
    print("PASS: spread", round(spread, 2), "ns; 10 ns clock first edges", safe, "; 3 ns clock first edges", tight)

    The five flops see the release between 2.25 and 3.55 ns. With a 10 ns period they all take the edge at 10 ns. With a 3 ns period the two earliest take the edge at 3 ns, while the other three miss it (their release plus recovery time is after 3 ns) and take the edge at 6 ns: the flops come out of reset one cycle apart. A counter that depends on all of them would start in a wrong state.

    What the review looks for

    • The reset network has a skew budget relative to the clock period; the spread of release arrival times across a domain is reported.

    • Release is synchronised per clock domain, so the tree only has to be balanced against one clock.

    • Reset buffers are in the timing analysis, not treated as ideal, because their delay is the arrival being checked.

    Common pitfall

    Using one global synchronised reset across clock domains. Every domain sees a different clock, so a single tree cannot be checked against all of them. Use one synchroniser per domain.

    Interview

    Explain partial release: the tree skew exceeds the margin to the clock edge, so flops leave reset in different cycles.

    Check yourself The release arrives between 2.25 and 3.55 ns on a 4 ns clock with 0.20 ns recovery. Is the release split?

    The earliest flop needs an edge at or after 2.45 ns (edge at 4 ns). The latest needs an edge at or after 3.75 ns (also 4 ns). Both take the 4 ns edge, so the release is not split, but the latest flop has only 0.25 ns of recovery slack.

    Related topics

    • Recovery and Removal Model

    • Next: Assertion Versus Release

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    See also

    • Recovery and Removal Signoff