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Constraint Bug Patterns: Debug Playbook

Debug Playbook for Constraint Bug Patterns.

Debug playbook

Debug Playbook for Constraint Bug Patterns focuses on false violation count after SDC fix, constraint audit pass rate. The goal is to connect the observable symptom to timing mechanism, ownership, and regression risk.

STA debug is a search for the FIRST deviation, not the loudest downstream symptom. Hold failures after setup ECO are a classic example of fixing the wrong layer first.

Root-cause tree

diagram
ROOT-CAUSE TREE — Constraint Bug Patterns

false violation count after SDC fix, constraint audit pass rate looks wrong
        |
   same netlist tag?
     /        \
   no          yes
   |            |
 view/SDC     real path or
 mismatch     constraint bug
 /    \           |
lib   SPEF    delay breakdown
diff  diff    cell vs net
  1. Freeze the failing netlist tag, SDC revision, and SPEF corner.

  2. Find the first constraint or delay anomaly on the critical path.

  3. Map the path to launch/capture clocks and path group.

  4. Classify the failure: constraint bug, view mismatch, cell delay, net delay, or SI.

  5. Prove the mechanism with one reduced path or isolated scenario.

  6. Patch the smallest owner-controlled fix and rerun setup, hold, and MMMC.

Review memo template

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STAFF STA REVIEW MEMO — STA Debug Playbook / Constraint Bug Patterns

1. Symptom
   - Watched metric: false violation count after SDC fix, constraint audit pass rate
   - Failing scenario: <corner/mode/view>
   - Path group: <reg2reg / in2reg / reg2out / async>
   - Database tags: <netlist, SDC, SPEF, lib>

2. Mechanism hypothesis
   - Primary mechanism: Most 'mystery' STA failures are wrong clocks, missing generated clocks, bad I/O delay, or over-broad exceptions.
   - Competing hypothesis: <constraint bug, view mismatch, cell delay, net delay, SI>
   - Missing evidence: <report_timing, clock report, constraint trace>

3. Proposed action
   - Minimal reversible change: <SDC fix, sizing, VT swap, route, useful skew>
   - Expected metric movement: <WNS/TNS delta>
   - Regression risk: hold, other corners, SI, leakage

4. Signoff
   - Re-run artifact: SDC diff, constraint validator log, before/after path report
   - Required owners: STA owner, RTL owner, synthesis owner
   - Final decision: ECO, waive, constraint fix, or escalate

STA deep dive

Debug hygiene separates senior STA leads from report readers.

Concept diagram

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DEBUG ORDER

1. same tags?  2. constraints?  3. view?  4. real path?  5. ECO

Metric graph

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ROOT CAUSE MIX (typical)

constraint bugs  ████████  35%
view mismatch    ██████    25%
real path        ██████    25%
methodology      ████      15%

Reports and artifacts

  • run manifest

  • SDC diff

  • SPEF tag

  • scenario isolation

Mini case study

Mystery regression: SPEF corner tag typo in run script — not a design bug.

Debug branches

  • Manifest every run

  • War room by path group

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

  • State corner, mode, view, and database tag with every slack claim.

  • Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

  • Comparing STA runs with different SPEF or SDC tags.

  • Broad false_path to green-wash violations.

  • Setup-only ECO without hold check.

Principal STA review addendum

Most 'mystery' STA failures are wrong clocks, missing generated clocks, bad I/O delay, or over-broad exceptions.

Metric: false violation count after SDC fix, constraint audit pass rate