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Course contents

  • Logic Synthesis Glossary
  • Logic Synthesis Cheatsheet
  • Synthesis Foundations14
  • Logic Optimisation and Mapping20
  • Constraints and Timing15
  • Sequential, FSM and Memory19
  • Datapath Synthesis14
  • Area, Power and Test14
  • Verification, ECO and Handoff15
    • Equivalence Checking
    • Incremental Compile and ECO
    • Physical-Aware Synthesis and Handoff
      • Wire-Load Models and Placement Estimates
      • Congestion and Mapping Choices
      • Floorplan Assumptions
      • The Handoff Package
      • What Physical Design Changes
  • Flows and Debugging15
  • Interview and Judgment11
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‹Physical-Aware Synthesis and Handoff
  1. Topics
  2. Logic Synthesis
  3. Verification, ECO and Handoff
  4. Physical-Aware Synthesis and Handoff
  5. Wire-Load Models and Placement Estimates

Part 7 · Verification, ECO and Handoff · Intermediate

Wire-Load Models and Placement Estimates

Wire-load models against placement-aware estimates with a worked delay example.

On this page

    What synthesis cannot see

    Placement happens after synthesis, so every net length is a guess. Delay needs resistance and capacitance, and both grow with length.

    A length guess wrong by a factor of two moves delay by a factor of four under a quadratic model. Correlation between estimate and route decides whether synthesis timing survives.

    Wire-load models

    A wire-load model maps net fanout to an expected length from historical statistics. It knows nothing about where the cells will land.

    In the simple model used here one table serves the whole design; real flows may select among several tables. Two nets with the same fanout get the same length even on opposite corners of the die.

    Fanout

    EXAMPLE length

    EXAMPLE delay

    2

    40 um

    96 fs

    4

    80 um

    384 fs

    8

    160 um

    1536 fs

    Placement-aware estimates

    A placement-aware flow builds a trial placement first and measures each net. Length comes from the bounding box of its pins, not from fanout.

    The same fanout-4 net may measure 40 um after placement instead of 80 um. Its EXAMPLE delay drops from 384 fs to 96 fs, exactly one quarter.

    Diagram
    EXAMPLE parameters, not a real process: r = 0.4 ohm/um, c = 0.3 fF/um
    Elmore delay of a uniform wire: d = 0.5 x r x c x L^2
    constant: 0.5 x 0.4 x 0.3 = 0.06, in units of fs/um^2
    fanout-4 net, wire-load length 80 um: d = 0.06 x 80^2 = 0.06 x 6400 = 384 fs
    same net, placed length 40 um: d = 0.06 x 40^2 = 0.06 x 1600 = 96 fs
    placed share = 96 / 384 = 0.25

    A wire-delay estimate in Python

    The program below applies the EXAMPLE Elmore model to four lengths plus the two nets above. Its six self-checks repeat the hand arithmetic exactly.

    example.py
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    import sys
    
    R_PER_UM = 0.4
    C_PER_UM_FF = 0.3
    K_FS_PER_UM2 = 0.5 * R_PER_UM * C_PER_UM_FF
    
    def delay_fs(length_um):
        return K_FS_PER_UM2 * length_um * length_um
    
    def close(got, want):
        return abs(got - want) / want < 1e-9
    
    pairs = [
        (50.0, 150.0),
        (100.0, 600.0),
        (200.0, 2400.0),
        (500.0, 15000.0),
        (80.0, 384.0),
        (40.0, 96.0),
    ]
    
    for i in range(len(pairs)):
        length, want = pairs[i]
        got = delay_fs(length)
        if not close(got, want):
            print("FAIL: length " + str(length) + " got " + str(got) + " want " + str(want))
            sys.exit(1)
    
    print("PASS: Elmore estimate matches hand arithmetic on 6 lengths")

    Common pitfall

    Treating a wire-load number as a promise misleads. It is a fanout average: short local nets pay margin they never needed, and long global nets miss margin they needed.

    Interview

    Likely probes: what a wire-load model knows, and why placement-aware helps.

    • Wire-load maps fanout to length from statistics, identical for equal fanouts.

    • Placement-aware measures each net bounding box, so identical fanouts differ.

    • Quadratic delay punishes length error: halving length quarters the EXAMPLE delay.

    Check yourself A net has fanout 8. What EXAMPLE length and delay does the table give?

    160 um and 1536 fs, from 0.06 times 160 squared.

    Check yourself The program checks 500 um at 15000 fs. Why is that 100 times the 50 um value?

    Length grows 10 times and delay is quadratic, so delay grows 100 times: 150 fs times 100.

    Related topics

    • Congestion and mapping

    • Delay models and slack

    • STA foundations

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    See also

    • Floorplan Assumptions
    • The Handoff Package
    • What Physical Design Changes