Spec snippet → env sketch → sequence → scoreboard for simple APB peripheral.
0–5 min: Read spec — APB regs CTRL/STATUS, one RW data reg
5–15 min: Env box diagram — active master, monitor, reg model, scoreboard
15–25 min: Sketch basic read/write sequence + driver handshake
25–35 min: Scoreboard FIFO compare for read data
35–45 min: Pitfalls + 5-minute smoke test plan
RUBRIC (score 1–5 each)
Mechanism accuracy — correct UVM pattern, no magic
Communication — narrates while sketching
Pitfalls — cites unprompted
Test mindset — smoke test + regression hook
STRONG HIRE: mechanism + pitfall + test without prompting
NO HIRE: silent coding, wrong TLM direction, no test planWhat if PREADY never comes?
Reset during active transfer?
Byte lane on narrow APB?
Who raises objection?
How regress this smoke?
Narrates DECLARE→TEST without prompting
Names pitfall unprompted
Smoke test and regression hook stated
Asks clarifying protocol questions early
Silent coding
Wrong TLM direction on diagram
No test plan after sketch
Cannot recover when stuck
CODE LAB FOLLOW-UP: uvm-l10-mock-apbComplete mock in 45 min wall clock.
Self-score rubric honestly.